MCIMX35 Motorola Semiconductor Products, MCIMX35 Datasheet - Page 73

• Manufacturer Part Number: MCIMX35
• Manufacturer: Motorola Semiconductor Products

Display read operation can be performed with wait states when each read access takes up to 4 display
interface clock cycles according to the DISP0_RD_WAIT_ST parameter in the
Freescale Semiconductor
DISPB_PAR_RS
DISPB_PAR_RS
DISPB_PAR_RS
DISPB_D#_CS
DISPB_D#_CS
DISPB_WR
(READ/WRITE)
DISPB_WR
(READ/WRITE)
DISPB_D#_CS
DISPB_WR
(READ/WRITE)
DISPB_BCLK
DISPB_DATA
DISPB_DATA
DISPB_DATA
DISPB_RD
(ENABLE)
DISPB_RD
(ENABLE)
DISPB_RD
(ENABLE)
MCIMX35 (i.MX35) Multimedia Applications Processor for Automotive Products Advance Information, Rev. 0
Figure 45. Asynchronous Parallel System 68k Interface (Type 2) Burst Mode TIming Diagram
Single access mode (all control signals are not active for one display interface clock after each display access)
Burst access mode with sampling by separate burst clock (BCLK)
Preliminary—Subject to Change Without Notice
Burst access mode with sampling by ENABLE signal
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