WM8978 Wolfson Microelectronics Ltd., WM8978 Datasheet - Page 92
![no-image](/images/no-image-200.jpg)
WM8978
Manufacturer Part Number
WM8978
Description
The WM8978 is a low power, high quality stereo codec designed for portable applications such as Digital still camera or Digital Camcorde
Manufacturer
Wolfson Microelectronics Ltd.
Datasheet
1.WM8978.pdf
(108 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
WM8978CGEFL/RV
Manufacturer:
WOLFSON
Quantity:
10 000
Part Number:
WM8978CGEFL/RV
Manufacturer:
WOLFSON
Quantity:
20 000
Company:
Part Number:
WM8978G
Manufacturer:
SANYO
Quantity:
87 018
Part Number:
WM8978G
Manufacturer:
WM
Quantity:
20 000
Part Number:
WM8978GEFL
Manufacturer:
WOLFSON
Quantity:
20 000
Company:
Part Number:
WM8978GEFL/RV
Manufacturer:
WOLFSON
Quantity:
9 870
WM8978
w
35 (23h)
36 (24h)
37 (25h)
38 (26h)
39 (27h)
40 (28h)
41 (29h)
43 (2Bh)
REGISTER
ADDRESS
8:4
3
2:0
8:5
4
3:0
8:6
5:0
8:0
8:0
8:0
8:4
3:0
8:6
5
4
BIT
NGEN
NGTH
PLL
PRESCALE
PLLN[3:0]
PLLK[23:18]
PLLK[17:9]
PLLK[8:0]
DEPTH3D
MUTERPGA2INV
INVROUT2
LABEL
0010
00000
0
000
0000
0
1000
000
01100
010010011
011101001
00000000
00000
0000
000
0
0
DEFAULT
ALC attack (gain ramp-down) time
(ALCMODE == 1)
0000
0001
0010
… (time doubles with every step)
1010
Reserved
ALC Noise gate function enable
1 = enable
0 = disable
ALC Noise gate threshold:
000=-39dB
001=-45dB
010=-51db
… (6dB steps)
111=-81dB
Reserved
Divide MCLK by 2 before input to PLL
Integer (N) part of PLL input/output frequency
ratio. Use values greater than 5 and less than
13.
Reserved
Fractional (K) part of PLL1 input/output
frequency ratio (treat as one 24-digit binary
number).
Fractional (K) part of PLL1 input/output
frequency ratio (treat as one 24-digit binary
number).
Fractional (K) part of PLL1 input/output
frequency ratio (treat as one 24-digit binary
number).
Reserved
Reserved
Stereo depth
0000: 0% (minimum 3D effect)
0001: 6.67%
....
1110: 93.3%
1111: 100% (maximum 3D effect)
Reserved
Mute input to INVROUT2 mixer
Mute input to INVROUT2 mixer
Per step
22.7us
45.4us
90.8us
23.2ms
DESCRIPTION
Per 6dB
182.4us
363.2us
726.4us
186ms
90% of range
1.31ms
2.62ms
5.26ms
1.348s
PTD Rev 2.6 November 2005
Preliminary Technical Data
Input Limiter/
Automatic
Level Control
(ALC)
Input Limiter/
Automatic
Level Control
(ALC)
Master Clock
and Phase
Locked Loop
(PLL)
Master Clock
and Phase
Locked Loop
(PLL)
Master Clock
and Phase
Locked Loop
(PLL)
Master Clock
and Phase
Locked Loop
(PLL)
Master Clock
and Phase
Locked Loop
(PLL)
3D Stereo
Enhancement
Analogue
Outputs
Analogue
Outputs
REFER TO
92