MAX17480 Maxim Integrated Products, MAX17480 Datasheet - Page 19

• Manufacturer Part Number: MAX17480
• Description: AMD 2-/3-Output Mobile Serial VID Controller
• Manufacturer: Maxim Integrated Products

w w w . D a t a S h e e t 4 U . c o m
PIN
33
34
35
36
37
38
OPTION
GNDS1
FBDC1
FBAC1
NAME
CSN1
CSP1
______________________________________________________________________________________
Positive Current-Sense Input for SMPS1. Connect to the positive side of the output current-sensing
resistor or the filtering capacitor if the DC resistance of the output inductor is utilized for current sensing.
Negative Current-Sense Input for SMPS1. Connect to the negative side of the output current-sensing
resistor or the filtering capacitor if the DC resistance of the output inductor is utilized for current sensing.
A 20
Feedback Sense Input for SMPS1. Connect a resistor R
of the feedback remote sense, and a capacitor from FBAC1 to couple the AC ripple from FBAC1 to
FBDC1. An integrator on FBDC1 corrects for output ripple and ground-sense offset.
To enable a DC load-line less than the AC load-line, add a resistor from FBAC1 to FBDC1.
To enable a DC load-line equal to the AC load-line, short FBAC1 to FBDC1. See the Core Steady-
State Voltage Positioning (DC Droop) section.
FBDC1 is high impedance in shutdown.
Output of the AC Voltage-Positioning Transconductance Amplifier for SMPS1. The RC network between
this pin and the positive side of the remote-sensed output voltage sets the transient AC droop:
where R
trade-off between stability and load-transient response, G
value of the current-sense element that is used to provide the (CSP1, CSN1) current-sense voltage,
Z
SMPS1 Remote Ground-Sense Input. Normally connected to GND directly at the load. GNDS1
internally connects to a transconductance amplifier that fine tunes the output voltage—
compensating for voltage drops from the SMPS ground to the load ground.
Connect GNDS1 or GNDS2 above 0.9V combined-mode operation (unified core). When GNDS1 is
pulled above 0.9V, GNDS2 is used as the remote ground-sense input.
Four-Level Input to Enable Offset and Change Core SMPS Address
When OFFSET is enabled, the MAX17480 enables a fixed +12.5mV offset on SMPS1 and SMPS2
VID codes after PGD_IN goes high. This configuration is intended for applications that implement a
load line. An external resistor at FBDC_ sets the load-line. The offset can be disabled by setting
the PSI_L bit to 0 through the serial interface.
Additionally, the OPTION level also allows core SMPS1 and SMPS2 to take on either the VDD0 or
VDD1 addresses. VDD0 refers to CORE0, and VDD1 refers to CORE1 for the AMD CPU.
The NB SMPS is not affected by the OPTION setting.
CFB1
is the impedance of C
OPTION
discharge FET is enabled from CSN1 to PGND when the SMPS1 is shut down.
R
DROOP_AC1
GND
3.3V
V
DROOP AC
2V
CC
_
AMD 2-/3-Output Mobile Serial
is the transient (AC) voltage-positioning slope that provides an acceptable
1
=
ENABLED
OFFSET
R
FBAC
0
0
1
1
FB1
, and FBAC1 is high impedance in shutdown.
1
R
+
FBAC
R
FBDC
BIT 1 (VDD0)
BIT 2 (VDD1)
BIT 1 (VDD0)
BIT 2 (VDD1)
1
ADDRESS
×
SMPS1
1
R
FUNCTION
+
FBDC
R
FB
1
Pin Description (continued)
1
Z Z
FBDC1
CFB
m(FBAC1)
1
BIT 2 (VDD1)
BIT 1 (VDD0)
BIT 2 (VDD1)
BIT 1 (VDD0)
between FBDC1 and the positive side
ADDRESS
×
VID Controller
SMPS2
R
SENSE
= 2mS (typ), R
1
×
G
m FBAC
(
SENSE1
1
)
is the
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