78Q2120 Teridian Semiconductor Corp. (TDK Semiconductor), 78Q2120 Datasheet - Page 12

• Manufacturer Part Number: 78Q2120
• Description: 10/100 Ethernet PHYS
• Manufacturer: Teridian Semiconductor Corp. (TDK Semiconductor)

MR0 - CONTROL REGISTER (continued)
0.6:0
BIT
0.8
0.7
SYMBOL
DUPLEX
RSVD
COLT
R, W, (1)
R, W, 0
TYPE
R, 0
DESCRIPTION
DUPLEX MODE: This bit determines whether the 78Q2120-64CGT
supports full duplex or half duplex. A logic one indicates full duplex
operation and a logic zero indicates half duplex. When auto-
negotiation is enabled, this bit will have no effect on the 78Q2120-
64CGT.
allowed by the TECH [2:0] pins. The MII can write to this bit, but
the bit will change value only if the new value is allowed by the
TECH pins.
COLLISION TEST: When this bit is set to one, the 78Q2120-64CGT
will assert the COL signal in response to the assertion of TX_EN
signal. Collision test is disabled in PCS bypass mode. Collision
test is enabled regardless of the duplex mode of operation.
RESERVED
At reset, this bit reflects the highest operating mode
12
Ethernet Transceiver
10/100BASE-TX