MAX106CHC Maxim, MAX106CHC Datasheet - Page 16

• Manufacturer Part Number: MAX106CHC
• Description: 5V / 600Msps / 8-Bit ADC with On-Chip 2.2GHz Bandwidth Track/Hold Amplifier
• Manufacturer: Maxim

The MAX106 also offers a special decimated, demulti-
plexed output (Figure 8) that discards every other input
sample and outputs data at one-quarter the input sam-
pling rate for system debugging at slower output data
rates. With an input clock of 600MHz, the effective out-
put data rate will be reduced to 150MHz per output port
in the DIV4 mode (Table 2). Since every other sample is
discarded, the effective sampling rate is 300Msps.
A single differential PECL overrange output bit (OR+,
OR-) is provided for both primary and auxiliary demulti-
plexed outputs. The operation of the overrange bit
depends on the status of the internal demultiplexer. In
demultiplexed DIV2 mode and decimation DIV4 mode,
±5V, 600Msps, 8-Bit ADC with On-Chip
2.2GHz Bandwidth Track/Hold Amplifier
Figure 8. Decimation DIV4-Mode Timing Diagram
Table 2. Demultiplexer Operation
X = Don’t care
16
DATA PORT
DATA PORT
AUXILIARY
PRIMARY
______________________________________________________________________________________
DREADY
NOTE: THE LATENCY TO THE PRIMARY PORT REMAINS 7.5 CLOCK CYCLES, WHILE THE LATENCY OF THE AUXILIARY PORT INCREASES TO 9.5 CLOCK CYCLES.
DEMUXEN
DREADY+
CLK
DREADY-
CLK+
CLK-
High
High
Low
THIS EFFECTIVELY DISCARDS EVERY OTHER SAMPLE AND REDUCES THE OUTPUT DATA RATE TO 1/4 THE SAMPLE CLOCK RATE.
n
ADC SAMPLE NUMBER
n+1
n+2
Overrange Operation
DIVSELECT
Decimation DIV4 Mode
High
Low
n+3
X
n+4
ADC SAMPLES ON THE RISING EDGE OF CLK+
n+5
DEMUX MODE
n+6
600Msps/port
300Msps/port
150Msps/port
DIV1
DIV2
DIV4
the OR bit will flag an overrange condition if either the
primary or auxiliary port contains an overranged sam-
ple (Table 2). In non-demultiplexed DIV1 mode, the OR
port will flag an overrange condition only when the pri-
mary output port contains an overranged sample.
The MAX106 T/H amplifier is designed to work at full
speed for both single-ended and differential analog
inputs (Figure 9). Inputs VIN+ and VIN- feature on-chip,
laser-trimmed 50Ω termination resistors to provide
excellent voltage standing-wave ratio (VSWR) perfor-
mance.
n+7
n+8
n+9
Applications Information
Flags overrange data appearing in the pri-
mary port only.
Flags overrange data appearing in either
the primary or auxiliary port.
n-2
Single-Ended Analog Inputs
n
OVERRANGE-BIT OPERATION
n+10
n+11
n+12
n+2
n+4
n+13