AD9215-65 Analog Devices, AD9215-65 Datasheet - Page 3

• Manufacturer Part Number: AD9215-65
• Description: 10-Bit, 65/80/105 MSPS 3.3 V A/D Converter
• Manufacturer: Analog Devices

DIGITAL SPECIFICATIONS
Parameter
LOGIC INPUTS
LOGIC OUTPUTS*
DRVDD = 3.3 V
NOTE
*Output Voltage Levels measured with 5 pF load on each output.
Specifications subject to change without notice.
REV. PrA
SWITCHING SPECIFICATIONS
Parameter
CLOCK INPUT PARAMETERS
DATA OUTPUT PARAMETERS
OUT-OF-RANGE RECOVERY
NOTES
1
2
3
Specifications subject to change without notice.
For the AD9215-65 model only, with duty cycle stabilizer enabled. DCS function not applicable for –20 and –40 models.
Output delay is measured from CLOCK 50% transition to DATA 50% transition, with 5 pF load on each output.
Wake-up time is dependant on value of decoupling capacitors, typical values shown with 0.1 µF and 10 µF capacitors on REFT and REFB.
High-Level Input Voltage
Low-Level Input Voltage
High-Level Input Current
Low-Level Input Current
Input Capacitance
High-Level Output Voltage
Low-Level Output Voltage
TIME
Max Conversion Rate
Min Conversion Rate
CLOCK Period
CLOCK Pulsewidth High
CLOCK Pulsewidth Low
Output Delay
Pipeline Delay (Latency)
Aperture Delay
Aperture Uncertainty (Jitter)
Wake-Up Time
2
(t
3
OD
)
ANALOG
CLOCK
INPUT
1
DATA
1
OUT
Temp Level
Full
Full
Full
Full
Full
Full
Full
Temp Level
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
N–9
N–3
N–8
N–2
Test
IV
IV
IV
IV
V
IV
IV
Test
VI
V
V
V
V
V
V
V
V
V
V
N–7
N–1
Figure 1. Timing Diagram
–10
–10
AVDD –50 mV
Min
2.0
AD9215BRU/CP-65
AD9215BRU/CP-65
65
15.4
2
Min
N–6
N
Typ
2
Typ
4
5
N–5
N+1
–3–
Max
0.8
+10
+10
0.05
Max
1
6
N–4
N+2
N–3
2.0
–10
–10
AVDD –50 mV
Min
AD9215BRU/CP-80 AD9215BRU/CP-105
AD9215BRU/CP-80 AD9215BRU/CP-105
80
12.5
2
Min
N+3
N–2
N+4
Typ
2
Typ
4
5
N–1
N+5
Max
0.8
+10
+10
0.05
Max
1
6
N
t
N+6
OD
= 6.0ns MAX
Min
2.0
–10
–10
AVDD –50 mV
Min
105
9.5
2
2.0ns MIN
Typ
2
Typ
4
5
Max
0.8
+10
+10
0.05
Max
1
6
AD9215
Unit
V
V
µA
µA
pF
V
V
Unit
MSPS
MSPS
ns
ns
ns
ns
Cycles
ns
ps rms
ms
Cycles