GS1559-CBE2 Gennum Corp., GS1559-CBE2 Datasheet - Page 65

• Manufacturer Part Number: GS1559-CBE2
• Description: HD-LINX II Multi-Rate Deserializer with Loop-Through Cable Driver
• Manufacturer: Gennum Corp.

4.12.2 Data Read and Write Timing
SDIN
SCLK
CS
SDOUT
SDIN
SCLK
CS
R/W
R/W
t
RSV
0
t
RSV
0
RSV
MSB
MSB
RSV
RSV
D15
R/W
RSV
RSV
RSV
t
RSV
D14
3
RSV
t
RSV
3
input data
setup time
RSV
input data
setup time
RSV
D13
RSV
RSV
t
2
RSV
RSV
t
Figure 4-10: Command Word
Figure 4-11: Data Word
Read and write mode timing for the GSPI interface is shown in
Figure 4-13
When writing to the registers via the GSPI, the MSB of the data word may be
presented to SDIN immediately following the falling edge of the LSB of the
command word. All SDIN data is sampled on the rising edge of SCLK.
When reading from the registers via the GSPI, the MSB of the data word will be
available on SDOUT 12ns following the falling edge of the LSB of the command
word, and thus may be read by the host on the very next rising edge of the clock.
The remaining bits are clocked out by the GS1559 on the negative edges of SCLK.
Figure 4-12: GSPI Read Mode Timing
Figure 4-13: GSPI Write Mode Timing
Proprietary and Confidential
2
duty
cycle
RSV
D12
RSV
RSV
duty
cycle
RSV
A5
A5
D11
RSV
A4
A4
respectively. The maximum SCLK frequency allowed is 6.6MHz.
A3
t
4
D10
RSV
A3
A2
t
period
A2
4
A1
RSV
D9
A1
period
A0
A0
RSV
D8
D15
D15
30572 - 1
t
5
D14
D14
RSV
D7
D13
D13
D12
D12
RSV
D6
D11
D11
GS1559 Preliminary Data Sheet
November 2004
D10
D10
t
6
D5
A5
D9
D9
output data
hold time
D8
D8
D4
A4
D7
D7
D6
D6
A3
D3
D5
D5
Figure 4-12
D4
D4
A2
D2
D3
D3
D2
D2
D1
A1
D1
D1
65 of 74
and
D0
D0
A0
D0
LSB
LSB