GS1559-CBE2 Gennum Corp., GS1559-CBE2 Datasheet - Page 43

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GS1559-CBE2

Manufacturer Part Number
GS1559-CBE2
Description
HD-LINX II Multi-Rate Deserializer with Loop-Through Cable Driver
Manufacturer
Gennum Corp.
Datasheet

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4.10.2 Ancillary Data Detection and Indication
Y/Cr/Cb DATA OUT
MULTIPLEXED
FIFO_LD
PCLK
Y/Cr/Cb DATA OUT
CHROMA DATA OUT
LUMA DATA OUT
MULTIPLEXED
3FF
CHROMA DATA OUT
FIFO_LD
FIFO_LD
PCLK
LUMA DATA OUT
Figure 4-5: FIFO_LD Pulse Timing
The GS1559 will detect all types of ancillary data in either the vertical or horizontal
blanking spaces and indicate via the status signal output pins YANC and CANC the
position of ancillary data in the output data stream. These status signal outputs are
synchronous with PCLK and can be used as clock enables to external logic, or as
write enables to an external FIFO or other memory device.
When operating in HD mode, (SD/HD = LOW), the YANC signal will be HIGH
whenever ancillary data is detected in the luma data stream, and the CANC signal
will be HIGH whenever ancillary data is detected in the chroma data stream.
Proprietary and Confidential
PCLK
FIFO_LD
3FF
PCLK
FIFO LOAD PULSE - SD 10BIT OUTPUT MODE
FIFO LOAD PULSE - SD 20BIT OUTPUT MODE
3FF
FIFO LOAD PULSE - HD 20BIT OUTPUT MODE
FIFO LOAD PULSE - HD 10BIT OUTPUT MODE
3FF
3FF
000
000
3FF
000
000
000
000
30572 - 1
(SAV)
000
XYZ
000
000
000
000
GS1559 Preliminary Data Sheet
November 2004
(SAV)
XYZ
(SAV)
(SAV)
XYZ
XYZ
000
(SAV)
XYZ
(SAV)
XYZ
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