CMX138 CML Microcircuits, CMX138 Datasheet - Page 36

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CMX138

Manufacturer Part Number
CMX138
Description
Audio Scrambler and Sub-Audio Signalling Processor
Manufacturer
CML Microcircuits
Datasheet

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Audio Scrambler and Sub-Audio Signalling Processor
8.1.1
The CMX138 will issue an interrupt on the IRQN line when the IRQ bit (bit 15) of the Status register and
the IRQ Mask bit (bit 15) are both set to 1. The IRQ bit is set when the state of the interrupt flag bits in the
Status register change from a 0 to 1 and the corresponding mask bit(s) in the Interrupt Mask register
is(are) set. Enabling an interrupt by setting a mask bit (0→1) after the corresponding Status register bit
has already been set to 1 will also cause the IRQ bit to be set.
All interrupt flag bits in the Status register, except the Programming Flag (bit 0), are cleared and the
interrupt request is cleared following the command/address phase of a C-BUS read of the Status register.
The Programming Flag bit is set to 1 only when it is permissible to write a new word to the Programming
register. See:
8.1.2
In normal operation, the most significant registers are:
Setting the Mode register to either Rx or Tx will automatically increase the internal clock speed to its
operational speed, whilst setting the Mode register to IDLE will automatically return the internal clock to a
lower (powersaving) speed. To access the Program Blocks (through the Programming register, $C8) the
device MUST be in IDLE mode.
The CMX138 manages the internal clocks automatically to minimise power consumption, using the
default values loaded in Program Block 3.
© 2008 CML Microsystems Plc
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Interrupt Operation
Status – $C6 read
Interrupt Mask - $CE write
General Notes
Mode Control – $C1 write
Status – $C6 read
Analogue Input Gain - $B0 write
Analogue Output Gain - $B1 write
Audio Control – $C2 write
Page 36
D/138_FI1.0/5
CMX138

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