CD016G0PFA Advanced Micro Devices, Inc., CD016G0PFA Datasheet - Page 16

• Manufacturer Part Number: CD016G0PFA
• Description: 16 Megabit(512 K X 32-Bit),CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/write Flash Memory
• Manufacturer: Advanced Micro Devices, Inc.

16
Simultaneous Read/Write Operations With Zero Latency
Writing Commands/Command Sequences
it is not tested by executing an embedded operation in the big (busy) bank while
performing other operations in the small (non-busy) bank. Table 2.
Also Table 18. ”Allowed Operations During Erase/Program Suspend. Also
Table 12. ”Sector Addresses for Ordering Option 00 and Table 13. ”Sector Ad-
dresses for Ordering Option 01.
The device is capable of reading data from one bank of memory while program-
ming or erasing in the other bank of memory. An erase operation may also be
suspended to read from or program to another location within the same bank (ex-
cept the sector being erased). Refer to the DC Characteristics table for read-
while-program and read-while-erase current specifications.
Simultaneous read/write operations are valid for both the main Flash memory
array and the SecSi OTP sector. Simultaneous Read/Write is disabled during the
CFI and Password Program/Verify operations. PPB Program/Erase operations and
the Password Unlock operation permit reading data from the large (75%) bank
while reading the operation status of these commands from the small (25%)
bank.
To write a command or command sequence (which includes programming data
to the device and erasing sectors of memory), the system must drive WE# and
CE# to V
The device features an Unlock Bypass mode to facilitate faster programming.
Once the device enters the Unlock Bypass mode, only two write cycles are re-
quired to program a word or byte, instead of four. The
Suspend Command
both standard and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device.
Tables 12 and 13 indicate the address space that each sector occupies. A “sector
address” consists of the address bits required to uniquely select a sector. The
Bank 0
Bank 1
Bank
IL
, and OE# to V
Table 2. Bank Assignment for Boot Bank
Bank 0
Bank 1
Bank 0
Bank 1
Bank
Bank
section has details on programming data to the device using
Ordering Option 00
Table 3. Ordering Option 00
Table 4. Ordering Option 01
IH
.
A d v a n c e
Small Bank
Big Bank
Sector Devices
S29CD016G
A19:A18
I n f o r m a t i o n
01, 1X
0X, 10
A19
00
11
Sector Erase and Program
Ordering Option 01
Small Bank
Big Bank
S29CD016_00A0 March 22, 2004