M25PX80 Numonyx, M25PX80 Datasheet - Page 30

• Manufacturer Part Number: M25PX80
• Description: 8-mbit, Dual I/o, 4-kbyte Subsector Erase, Serial Flash Memory With 75 Mhz Spi Bus Interface
• Manufacturer: Numonyx

6.9
30/60
When the highest address is reached, the address counter rolls over to 00 0000h, so that
the read sequence can be continued indefinitely.
Figure 14. Dual Output Fast Read instruction sequence
1. A23 to A22 are Don't care.
Read Lock Register (RDLR)
The device is first selected by driving Chip Select (S) Low. The instruction code for the Read
Lock Register (RDLR) instruction is followed by a 3-byte address (A23-A0) pointing to any
location inside the concerned sector. Each address bit is latched-in during the rising edge of
Serial Clock (C). Then the value of the Lock Register is shifted out on Serial Data output
(DQ1), each bit being shifted out, at a maximum frequency f
Serial Clock (C).
The instruction sequence is shown in
The Read Lock Register (RDLR) instruction is terminated by driving Chip Select (S) High at
any time during data output.
Any Read Lock Register (RDLR) instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
DQ0
DQ0
DQ1
DQ1
C
S
C
S
Mode 3
Mode 2
32 33 34
Dummy byte
0
35
1
36 37 38 39 40 41 42 43 44 45 46
2
Instruction
High Impedance
3
4
MSB
5
6
7
DATA OUT 1
6
Figure
4
5
7
2
3
23 22 21
8
0
1
15.
MSB
9 10
6
7
DATA OUT 2 DATA OUT 3
24-bit address
4
5
2
3
3
28 29 30 31
0
1
47
2
MSB
6
7
1
C
4
5
, during the falling edge of
0
2
3
0
1
MSB
6
7
DATA OUT n
4
5
2
3
0
1
MSB
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