CAT25020 Catalyst Semiconductor, CAT25020 Datasheet - Page 10

• Manufacturer Part Number: CAT25020
• Description: 2k Spi Serial Cmos Eeprom
• Manufacturer: Catalyst Semiconductor

CAT25010, CAT25020, CAT25040
Hold Operation
The HOLD
between host and CAT25010/20/40. To pause, HOLD
must be taken low while SCK is low (Figure 10).
During the hold condition the device must remain
selected (CS
pin (SO) is tri-stated (high impedance) and SI
transitions are ignored. To resume communication,
¯¯¯¯¯ must be taken high while SCK is low.
HOLD
DESIGN CONSIDERATIONS
The CAT25010/20/40 devices incorporate Power-On
Reset (POR) circuitry which protects the internal logic
against powering up in the wrong state. The device
will power up into Standby mode after V
the POR trigger level and will power down into Reset
mode when V
This bi-directional POR behavior protects the device
against ‘brown-out’ failure following a temporary loss
of power.
The CAT25010/20/40 device powers up in a write
disable state and in a low power standby mode. A
WREN instruction must be issued prior any writes to
the device.
Figure 10. HOLD
Note: Dashed Line = mode (1, 1) - - - - - -
Doc. No. MD-1006 Rev. T
¯¯¯¯¯ input can be used to pause communication
HOLD
SCK
SO
CS
¯¯ low). During the pause, the data output
¯¯¯¯¯ Timing
CC
drops below the POR trigger level.
t HD
t CD
t HZ
CC
exceeds
¯¯¯¯¯
10
After power up, the CS
enter a ready state and receive an instruction. After a
successful byte/page write or status register write, the
device goes into a write disable mode. The CS
must be set high after the proper number of clock
cycles to start the internal write cycle. Access to the
memory array during an internal write cycle is ignored
and programming is continued. Any invalid op-code
will be ignored and the serial output pin (SO) will
remain in the high impedance state.
HIGH IMPEDANCE
t HD
t CD
t LZ
¯¯ pin must be brought low to
Characteristics subject to change without notice
© Catalyst Semiconductor, Inc.
¯¯ input