OM6213 NXP Semiconductors, OM6213 Datasheet - Page 9

• Manufacturer Part Number: OM6213
• Description: Om6213 48 X 84 Pixels Matrix Lcd Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9
Immediately following power-on, all internal registers and
the RAM content are undefined. A reset (RES) pulse must
be applied. It should be noted that the device may be
damaged if not properly reset.
Reset is accomplished by applying an external RES pulse
(active LOW) at pad RES. When reset occurs within the
specified time, all internal registers are reset, however the
RAM is still undefined. The state after reset is described in
Section “Reset function”.
RES input must be
V
Fig.16).
10 ADDRESSING
Data is downloaded in bytes into the RAM matrix of the
OM6213 as indicated in Figs.3, 4, 5 and 6. The display
RAM has a matrix of 48
addressed by the address pointer.
10.1
2001 Nov 07
handbook, full pagewidth
DD(min)
48
INITIALIZATION
Data structure
(or higher) according to t
84 pixels matrix LCD driver
MSB
LSB
0.3V
84 bits. The columns are
DD1
after V
0
VHRL
DD1
timing (see
reaches
Fig.4 RAM format, addressing.
9
The address ranges are: X = 0 to 83 (1010011) and
Y = 0 to 5 (101). Addresses outside these ranges are not
allowed.
In vertical addressing mode (V = 1) the Y address
increments after each byte (see Fig.5). After the last
Y address (Y = 5) Y wraps around to 0 and X increments
to address the next column.
In horizontal addressing mode (V = 0) the X address
increments after each byte; see Fig.6. After the last
X address (X = 83) X wraps around to 0 and Y increments
to address the next row.
After the very last address (X = 83 and Y = 5) the address
pointers wrap around to address (X = 0 and Y = 0).
X address
Y address
83
Product specification
MGT843
OM6213
0
5