OM6211 NXP Semiconductors, OM6211 Datasheet - Page 8

• Manufacturer Part Number: OM6211
• Description: 48 X 84 Dot Matrix Lcd Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9.1
The OM6211 has no internal Power-on reset, only external
reset and reset by command. After power-on an external
reset is required. A reset initiated either from the RES pin
or by command will initialize the chip to the following
starting conditions:
9.2
The chip is in Power-down mode if the display is off
(DON = 0) and display all points is on (DAL = 1),
regardless of the order in which both bits are set. During
the Power-down mode almost all static currents are
switched off (no internal oscillator, no timing and no LCD
segment drive system), and all LCD outputs are internally
connected to V
HVE is not affected). The serial interface function remains.
RAM data is unchanged. When exiting the Power-down
mode, the V
2002 Jan 17
Power-down mode (DON = 0 and DAL = 1):
– Internal oscillator stopped
– The V
– Display is off and all LCD outputs are internally
– Display all points is on (DAL = 1).
Serial interface initialized; write mode
Display normal video (E = 0)
Address counter X
line Z
Bias system
V
Voltage multiplication factor 4 (S
Temperature control mode TC3 (TC
Frequency not calibrated and OC = 0
RAM data is unchanged (after power-up undefined).
48
LCD
(HVE = 0) and V
connected to V
Reset
Power-down
5
selection V
to Z
84 dot matrix LCD driver
LCD
OS
0
= 0; no Y mirroring (MY = 0)
SS
generator (HV generator) is switched off
1
value is stored in a register.
7
. The V
(BS
PR7
SS
6
LCDOUT
2
to X
to V
(DON = 0)
to BS
LCD
0
PR0
= 0; Y
generator is switched off (but
0
is 3-state
= 100)
= 0
2
1
to Y
and S
1
0
and TC
= 0; display start
0
= 10)
0
= 11)
8
9.3
The practical value for V
V
typically when the LCD exhibits approximately 10%
contrast.
9.4
The internal logic operation and the multi-level drive
signals of the OM6211 are clocked by the built-in RC
oscillator. No external components are required. The
oscillator is in operation as long as the chip is not in
Power-down mode.
9.5
The timing of the OM6211 organizes the internal data flow
of the device. The timing also generates the LCD frame
frequency that is derived from the clock frequency
generated by the internal clock generator.
9.6
The LCD drive section includes 84 column outputs, which
should be connected directly to the LCD. The column
output signals are generated in accordance with the
multiplexed row signals and with the data in the display
latch. If less than 84 columns are required, the unused
column outputs should be left open-circuit.
9.7
The LCD drive section includes 48 row outputs, which
should be connected directly to the LCD. If less than
48 rows are required, the unused row outputs should be
left open-circuit.
off(rms)
LCD voltage selector
Oscillator
Timing
Column driver outputs
Row driver outputs
with a defined LCD threshold voltage (V
LCD
is determined by equating
Product specification
OM6211
th
),