OM6211 NXP Semiconductors, OM6211 Datasheet - Page 30

• Manufacturer Part Number: OM6211
• Description: 48 X 84 Dot Matrix Lcd Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
All OTP circuitry of the OM6211 is disabled until the
‘Enable OTP’ command is given. Once enabled, the
reading of data from the OTP cells is initiated by either:
It should be noted that in both cases the reading operation
needs up to 5 ms to complete.
The shifting of data into the shift register is performed in a
special mode called CALMM. In the OM6211 the CALMM
mode is entered through the CALMM command. Once in
the CALMM mode the data is shifted into the shift register
via the serial interface at the rate of 1-bit per command.
After transmitting the last (14th) bit and exiting the CALMM
mode the serial interface returns to the normal mode and
all other commands can be sent. Care should be taken that
all 14 bits of data (or a multiple of 14) are transferred
before exiting the CALMM mode, otherwise the bits will be
in the wrong positions.
2002 Jan 17
handbook, full pagewidth
Exit from Power-down mode
The ‘Refresh’ command.
48
84 dot matrix LCD driver
read data
OTP cell
from the
REGISTER
FLIP-FLOP
OTP slice
OTP CELL
SHIFT
write data
to the
OTP cell
REGISTER
INPUT
SHIFT
DATA
Fig.22 Basic OTP architecture.
CONFIGURATION AND CALIBRATION
30
In the shift register the value of the seal bit is, like the
others, always zero at reset. To ensure that the security
feature works correctly, the CALMM command is disabled
until a refresh has been performed. Once the refresh is
completed, the seal bit value in the shift register is valid
and permission to enter CALMM mode can thus be
determined.
The 14 bits are shifted into the shift register in a predefined
order: firstly the 8 bits of MMOTPVOP
then the 5 bits of MMVOPCAL
the seal bit. The MSB is always first, thus the first bit
shifted is MMOTPVOP
MMVOPCAL
DATA TO THE CIRCUIT FOR
0
and the seal bit.
7
and the two last bits are
4
to MMVOPCAL
Product specification
7
SHIFT
REGISTER
OTP CELLs
to MMOTPVOP
OM6211
MGU289
0
and lastly
0
,