T81L0006B TM Technology Inc., T81L0006B Datasheet - Page 17

• Manufacturer Part Number: T81L0006B
• Description: 8-bit A/d Type Mcu
• Manufacturer: TM Technology Inc.

tm
10.5 A/D converter
The data acquisition component is an 8-bit analog-to-digital converter, 8-channel multiplexer and microcontroller compatible
control logic. The 8-bit A/D converter uses successive approximation conversion technique. The 8-channel multiplexer can
directly access any of 8-single-ended analog signals. The device eliminates the need for external zero and full-scale
adjustments. The design of the component has been optimized by incorporating the most desirable aspects of several A/D
conversion techniques. The component offers high speed, high accuracy, minimal temperature dependence, excellent
long-term accuracy and repeatability, and consumes minimal power. These features make this device ideally suitable from
process and machine control to consumer applications.
A/D Converter Register Control
ADENB
ADI
ADS
EOC
CHS2: CHS0 --- Channel select
ADPS2: ADPS0 ---A/D clock divider, Input frequency = F
ADB7 ~ADB0--- 8-bit ADC converting data
ENCH7 ~ENCH0 --- ADC individual input channel enable bit:
TM Technology Inc. reserves the right
ADM
ADR
ADB
ADE
to change products or specifications without notice.
00100000
x010xxxx
xxxxxxxx
00000000
Default
Default
Default
Default
channels is individually enabled or disabled by setting or clearing ENCH7~ENCH0
enable bits.
in place of external interrupt 1 function.
CH
TE
Disable all A/D converter input channels: 0-Disable, 1-Enable
A/D Interrupt bit: 0-Disable, 1-Enable
A/D Start bit: 0-Stop, 1-Start
A/D Status bit: 0- Busy, 1-End of converting and clear ADS bit
If ADENB=0, all input channel will be closed. If ADENB =1, each input
If ADI=1, external interrupt 1 will be inhibited. A/D converter interrupt function will
ADENB
ENCH7
ADB7
R/W
R/W
R
-
-
0-Disable, 1-Enable
ENCH6
ADPS2
ADPS2:1:0
ADB6
R/W
ADS
R/W
R/W
R
000
001
010
100
101
011
110
111
ENCH5
ADPS1
ADB5
EOC
R/W
R/W
R
R
ENCH4
ADPS0
ADB4
Dividers Ratio Fad: Fosc/12
R/W
R/W
R/W
ADI
R
P. 17
ENCH3
ADB3
R/W
R
-
-
-
-
1:128
1:16
1:32
1:64
1:1
1:2
1:4
1:8
OSC
/3
ENCH2
ADB2
CHS2
R/W
R/W
R
-
-
ENCH1
ADB1
CHS1
R/W
R/W
R
-
-
Publication Date: JAN. 2006
ENCH0
ADB0
CHS0
R/W
R/W
R
-
-
T81L0006A/B
Revsion : C