T81L0006B TM Technology Inc., T81L0006B Datasheet - Page 13

• Manufacturer Part Number: T81L0006B
• Description: 8-bit A/d Type Mcu
• Manufacturer: TM Technology Inc.

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T81L0006A/B
Watchdog Timer
The watchdog timer is a 16-bit counter that is incremented once every 24 or 384 clock cycles. After an external reset the
watchdog timer is disabled and all registers are set to zeros.
! Watchdog Timer structure
The watchdog consists of 16-bit counter wdt, reload register wdtrel, prescalers by 2 and by 16 and control logic. Where
wdtl=00h while start up.
Figure
Watchdog block diagram
! Start procedure
There are one way to start the watchdog. A programmer can start the watchdog as refreshing procedure. Once the watchdog
is started it cannot be stopped unless rst signal becomes active. When wdt registers enters the state 7FFCh, asynchronous
wdts signal will become active. The signal wdts sets the bit 6 in ip0 register and requests reset state. The wdts is cleared
either by rst signal or change of the state of the wdt timer.
Procedure: load wdtrel value # # # # set “wdt” # # # # set “swdt” in 12 instruction cycles.
! Refreshing the watchdog timer
The watchdog timer must be refreshed regularly to prevent reset request signal from becoming active. This requirement
imposes obligation on the programmer to issue two followed instructions. The first instruction sets wdt and the second one
swdt. The maximum allowed delay between settings of the wdt and swdt is 12 instruction cycles. While this period has
expired and swdt has not been set, wdt is automatically reset, otherwise the watchdog timer is reloaded with the content of
the wdtrel register and wdt is automatically reset. The procedure is as “Start procedure” before.
TM Technology Inc. reserves the right
P. 13
Publication Date: JAN. 2006
to change products or specifications without notice.
Revsion : C