SPFMIT302 Avago Technologies, SPFMIT302 Datasheet - Page 7

• Manufacturer Part Number: SPFMIT302
• Description: Plastic Fiber Optic Transmitter For Most
• Manufacturer: Avago Technologies

Design & Layout rules
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Layout example
The reference board from OASIS Silicon Systems follows the requirements above. The schematic is very similar to the
example above, but does not include the connection to the power supply, the OS8104 or the microcontroller.
The examples below for top- and bottom layer is the layout of the reference design board and shows how the layout
around the optical receiver and transmitter should look like.
It is strongly recommended to follow this examples in your design to get best performance!
Note:
1. The buffer circuit (IC1), the connectors and jumpers in the middle to the right section of the schematic are only for use of the reference board
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The 100nF bypass capacitors of the FOTs must be located as close as possible between the pins Vcc and GND of the
FOTs. Use ceramic caps and tantalum caps with low ESR.
Also the inductor/ferrite bead (receiver) and the -3dB - control circuit (transmitter) must be placed as close as
possible to the FOTs. We prefer ferrite beads (e.g. type 74279214 Würth Elektronik) since the d.c. resistance is very
low. If other inductors are used the d.c. resistor should be less than 3Ohm.
For EMC a ferrite bead should be connected to the power supply close to the transmitter and the receiver. Do not
use only one ferrite bead together for receiver and transmitter!
For the ground connection a ground plane is recommended (Y-structure). That means the ground planes of the
transmitter, the receiver and the shielding must be separated. The three ground planes should be connected
together behind the bypass capacitors (refer to the PCB design below). This ground signal should be connected
directly to the ground plane of the MOST controller (e.g. OS8104) and the power supply on the top layer and/or
bottom layer and ground layer as it is indicated in the example below.
If a multi layer design is used the ground layer must have the same ground separation like shown for the top layer!
A serial resistor in the Rx/Tx data line will also reduce EMC - problems. For Rx the resistor must be placed near the
receiver - for Tx the resistor must be placed near the MOST controller chip. The value depends from the distance
between the FOTs and the MOST chip (< 5cm) and can be in the range of up to 150R. Higher values for the resistors
will increase jitter and can therefore cause locking problems of the MOST PLL!
The Rx/Tx signals should not be routed parallel over a long distance but may be embedded with ground copper, if
possible.
The GND pin and the pin of Rext (15K - resistor) of the transmitter are used for heat dissipation. Therefore there
should be a good connection to the PCB - no isolation gaps! Both pins should dip into a copper area (see layout
example below).
and will not be necessary for your HW - design.