S5K3A1EA Samsung Semiconductor, Inc., S5K3A1EA Datasheet - Page 23

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S5K3A1EA

Manufacturer Part Number
S5K3A1EA
Description
1/3?sxga Cmos Image Sensor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1/3 INCH SXGA CMOS IMAGE SENSOR
and some fixed pattern noise by the in-pixel amplifier offset deviation. To eliminate those noise components, a
correlated double sampling(CDS) circuit is used before converting to digital. The output signal of each pixel is
sampled twice, once for the reset level and once for the actual signal level.
2-3. Programmable Gain and Offset Control
Control Registers (pgcr, pgcg1, pgcg2, pgcb) and offset by Offset Control Registers
(offsr, offsg1, offsg2, offsb). If the Color Channel Separation Mode is disabled
(ccsm=0), pgcg1 and offsg1 change the gains and offsets for all channels. As increasing
the gain control register, the ADC conversion input range decreases and the gain
increases as following equation and the relative channel gain is shown in figure 3
2-4. Quadrisectional Global Gain Control
Registers (sgg1, sgg2, sgg3, sgg4). The global gain control register is composed of four register groups and
each register value decides the gain for each quarter section of output code level. At MCLK=12MHz and
ggo_en=L, the global gain is determined by the following formula.
The user can controls the global gain to change the gain for all color channels by the Global Gain Control
The user can controls the gain of individual color channel by the Programmable Gain
Global Gain = (sgg[4:0]+1) / 16
10
9
8
7
6
5
4
3
2
1
Channel Gain = 128 / (128 – Programmable Gain Control Register Value[6:0])
0
16
Program m able Gain Control
32
48
64
80
Figure 3. Relative Channel Gain
96
112
128
45
40
35
30
25
20
15
10
5
0
0
16
Program m able Gain Control
32
48
64
80
G2 B
G2 B
R G1
R G1
96
G2 B
G2 B
R G1
R G1
112
S5K3A1EA
128
23

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