S5K3A1EA Samsung Semiconductor, Inc., S5K3A1EA Datasheet - Page 14

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S5K3A1EA

Manufacturer Part Number
S5K3A1EA
Description
1/3?sxga Cmos Image Sensor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
S5K3A1EA
CONTROL REGISTERS
14
Address
(Hex)
0Ah
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
Reset
Value
0Eh
0Eh
01h
00h
00h
00h
04h
00h
05h
00h
80h
Bits
[4:2]
[3:2]
[1:0]
[2:0]
[7:0]
[2:0]
[7:0]
[2:0]
[7:0]
[2:0]
[7:0]
[7:0]
[7]
[6]
[5]
[1]
[0]
[7]
[6]
[5]
[4]
shut_err_cor
Mnemonic
wcw_high
wcp_high
p2_r_con
wrp_high
wrd_high
wcw_low
wcp_low
wrp_low
wrd_low
Not_use
offsdef
adcres
mcdiv
subsc
mirch
subsr
shutc
mircv
bprm
ccsm
(Factory use only) CDS timing control
Bad pixel replacement mode
Color channel separation mode
Main clock divider
Electronic shutter mode
ADC resolution
Vertical mirror control
Horizontal mirror control
Row sub-sampling mode
Column sub-sampling mode
Row start point for window of interest
Column start point for window of interest
Row depth for window of interest
Column width for window of interest
(Factory use only) Analog offset reference
0b: disabled (default), 1b: enabled
0b: not separated (default), 1b: separated
000b: DCLK=MCLK(default), 001b: DCLK=MCLKy2
010b: DCLK=MCLKy4,
100b: DCLK=MCLKy16,
111b: forbidden value
0b: disabled (default), 1b: enabled
0b: 8-bit, 1b: 10-bit (default)
0b: normal (default), 1b: mirrored
0b: normal (default), 1b: mirrored
00b: disabled (default),
01b: 2X, 10b: 4X, 11b: 8X
00b: disabled (default),
01b: 2X, 10b: 4X, 11b: 8X
wrp[10:0] = 14d(default)
wcp[10:0] = 14d(default)
wrd[10:0] = 1024d(default)
wcw[10:0] = 1280d(default)
offsdef[7:0] = 128d (default)
Shutter error correction register
Description
1/3” SXGA CMOS IMAGE SENSOR
011b: DCLK=MCLKy8
101b: DCLK=MCLKy32

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