HN29V51211 Renesas Electronics Corporation., HN29V51211 Datasheet - Page 10
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HN29V51211
Manufacturer Part Number
HN29V51211
Description
512m And Type Flash Memory More Than 32,113-sector 542,581,248-bit - Hitachi Semiconductor
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.HN29V51211.pdf
(42 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HN29V51211T-50H
Manufacturer:
ALESIS
Quantity:
622
HN29V51211 Series
Command
Read
Auto erase
Auto program Program (1)
Reset
Clear status register
Data recovery write
Notes: 1. Commands and sector address are latched at rising edge of WE pulses. Program data is latched
10
2. The chip is in the read status register mode when RES is set to V
3. Refer to the command read and write mode in mode selection.
4. SA (1) = Sector address (A0 to A7), SA (2) = Sector address (A8 to A14).
5. CA (1) = Column address (A0 to A7), CA (2) = Column address (A8 to A11).
6. The variable h is the input number of times of set of CA (1) and CA (2) (1 h 2048 + 64).
7. By using program (1) and (3), data can additionally be programmed maximum 15 times for each
8. ID = Identifier code; Manufacturer code (07H), Device code (9DH).
9. The manufacturer identifier code is output when CDE is low and the device identifier code is output
10. Before program (2) operations, data in the programmed sector must be erased.
11. No commands can be written during auto program and erase (when the RDY/Busy pin outputs a
12. The fourth or sixth cycle of the auto program comes after the program data input is complete.
(0 A11 to A0 83FH)
at rising edge of SC pulses.
Set of CA (1) and CA (2) can be input not only one time but free times.
sector before erase.
when CDE is high.
V
OL
).
Serial read (1) (Without CA) 3
Serial read (2)
Read identifier codes
Data recovery read
Single sector
Program (2)*
Program (3) (Control bytes)*
Program (4)
10
(With CA)
(Without
CA*
(With CA*
(WithoutCA*
(With CA*
7
)
7
7
)
)
7
) 4
7
Bus
cycles
3 + 2h*
3
1
1
4
4
4 + 2h*
4
4
4 + 2h*
1
1
4
6
6
6
Fifth bus cycle
Operation
mode
Write
Write
Write
Data in
CA (2)*
CA (2)*
CA (2)
5
5
IHR
first time after the power up.
Sixth bus cycle
Operation
mode
Write
Write
Data in
40H
40H
*11, 12
*11, 12