HN29V51211 Renesas Electronics Corporation., HN29V51211 Datasheet
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HN29V51211
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HN29V51211 Summary of contents
Page 1
... V power supply. The functions are controlled by simple external commands. To fit the I/O card applications, the unit of programming and erase is as small as (2048 + 64) bytes. Initial available sectors of HN29V51211 are more than 32,113 (98% of all sector address) and less than 32,768 sectors. ...
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... HN29V51211 Series Erase mode Single sector erase ((2048 + 64) byte unit) Fast serial read access time: First access time: 50 µs (max) Serial access time (max) Low power dissipation (typ) (Read) CC1 (max) (Read) CC2 µA (max) (Standby) SB2 ...
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... SS HN29V51211 Series ...
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... HN29V51211 Series Pin Description Pin name I/ CDE RDY/Busy RES SC NC Note: 1. All V and V pins should be connected to a common power supply and a ground, respectively Function Input/output Chip enable Output enable Write enable Command data enable Power supply ...
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... CE OE Read/Program/Erase control Control WE signal SC buffer RES CDE 2048 + 64 X-decoder 32768 (2048 + 64) memory matrix Data register (2048 + 64) Data Input • • Y-gating input data • • buffer control Y-decoder Y-address • counter • HN29V51211 Series 8 Data output buffer • • • 5 ...
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... HN29V51211 Series Memory Map and Address Sector address 7FFFH 7FFEH 7FFDH 0002H 0001H 0000H 000H Address Cycles Sector address SA (1): First cycle SA (2): Second cycle Column address CA (1): First cycle CA (2): Second cycle Notes: 1. Some failed sectors may exist in the device. The failed sectors can be recognized by reading the sector valid data written in a part of the column address 800 to 83F (The specific address is TBD ...
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... IH IH IHR IHR IHR IL and maintain the HN29V51211 Series (V IHR I/O0 to I/O7 High-Z OH High-Z OH High-Z OH Status register outputs OH Din OH (conventional read operation level while the RDY/Busy pin referred to DC characteristics ...
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... HN29V51211 Series 1, 2 Command Definition* Command Read Serial read (1) (Without CA) 3 (With CA) Serial read (2) Read identifier codes Data recovery read Auto erase Single sector Auto program Program (1) (Without 7 CA* ) (With CA* 10 Program (2)* Program (3) (Control bytes)* Program (4) (WithoutCA* (With CA* Reset Clear status register ...
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... SA (2 Write SA (2 Write SA (2 2h* Write SA (2 Write SA (2)* HN29V51211 Series Fourth bus cycle Operation Data in mode 5 Write CA (1)* 11 Write B0H* *11, 12 Write 40H Write CA (1) *11, 12 Write 40H *11, 12 Write 40H *11, 12 Write 40H ...
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... HN29V51211 Series Command Read Serial read (1) (Without CA) 3 (With CA) Serial read (2) Read identifier codes Data recovery read Auto erase Single sector Auto program Program (1) (Without 7 CA* ) (With CA* 10 Program (2)* Program (3) (Control bytes)* Program (4) (WithoutCA* (With CA* Reset Clear status register Data recovery write Notes: 1 ...
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... When the column is programmed, the data of the column must be [FF]. After the programming starts, the program completion can be checked through the RDY/Busy signal and status data polling. Programmed bits in the sector turn from "1" to "0" when they are programmed. HN29V51211 Series . IH ...
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... HN29V51211 Series Program (4): Program data PD0 to PD2111 is programmed into the sector of address SA automatically by internal control circuits. When CA is input, program data PD ( programmed from CA into the sector of address SA automatically by internal control circuits. By using program (4), data can be rewritten for each sector before the following erase. So the column data before programming operation are either " ...
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... Program (4) mode, rewritten sector of address SA’ needs no sector erase before rewrite. After the data recovery write mode starts, the program completion can be checked through the RDY/Busy signal and the status data polling. HN29V51211 Series . The read data are invalid when addresses IH ...
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... HN29V51211 Series Command/Address/Data Input Sequence Serial Read (1) (With CA before SC) Command 00H SA (1) SA (2) /Address CDE WE Low SC Serial Read (1) (With CA after SC) Command 00H SA (1) SA (2) /Address CDE WE Low SC Data output Serial Read (1) (Without CA), (2) Command/Address 00H/F0H CDE WE Low SC Single Sector Erase Command/Address ...
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... CDE WE SC Low CA (2) CA (1)' CA (2)' Data input CA (1) CA (2) CA (1)' Data input SA (1) SA (2) Data input SA (1) SA (2) Data input HN29V51211 Series 40H Data input Program start CA (2)' 40H Data input Program start 40H Program start 40H Program start 15 ...
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... HN29V51211 Series Program (3) Command/Address 0FH CDE WE SC Low ID Read Mode Command/Address CDE WE SC Low Data Recovery Read Mode Command/Address Data Recovery Write Mode Command/Address CDE (1) SA (2) Data input 90H Manufacture Device code code output output 01H CDE WE SC Low ...
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... SC, CDE Program finish 50H 1 01H* Data recovery read setup CE Error 1 12H* Output Data recovery standby disable write setup FFH OE HN29V51211 Series OE CA(1)' SC CA(2)' Read (1) / (2) BUSY OE Status register Erase read start OE 40H Status register Program read start OE 40H Status register ...
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... HN29V51211 Series Absolute Maximum Ratings Parameter V voltage CC V voltage SS All input and output voltages Operating temperature range Storage temperature range Storage temperature under bias Notes: 1. Relative Vin, Vout = –2.0 V for pulse width 20 ns. 3. Device storage temperature range before programming. ...
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... — — 0.4 V 2.4 — — V min = –2.0 V for pulse width over the specified maximum value, the IH – 0 HN29V51211 Series Test conditions Vin = Vout = ± 0 RES = V ± 0 RES = V ± 0 Iout = 0 mA ...
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... HN29V51211 Series Power on and off, Serial Read Mode Parameter Symbol Write cycle time t CWC Serial clock cycle time t SCC CE setup time t CES CE hold time t CEH Write pulse time t WP Write pulse high time t WPH Address setup time t AS Address hold time ...
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... Min Typ Max Unit Test conditions 50 — — — — ns — — 30 µs 200 — — ns — — 150 ns — 45 — µs is greater than the specified t WSD . SAC HN29V51211 Series Notes (min) WSD 21 ...
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... HN29V51211 Series Program, Erase and Erase Verify Parameter Symbol Write cycle time t CWC Serial clock cycle time t SCC CE setup time t CES CE hold time t CEH Write pulse time t WP Write pulse high time t WPH Address setup time t AS Address hold time t AH ...
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... SC to output delay t SAC SC to output hold t SH RDY/Busy setup for Busy time on read mode t RBSY Note time after which the I/O pins become open. DF HN29V51211 Series Min Typ Max Unit Test conditions — — 120 ns — — — — ...
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... HN29V51211 Series Timing Waveforms Power on and off Sequence VRS CES WE t CWRS RES BSY RDY /Busy Notes: 1. RES must be kept at the V ILR to guarantee data stored in the chip. 2. RES must be kept at the V IHR status data polling and RDY/Busy outputs the V 3 ...
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... SPL SAC SAC SAC t SAC OEL OEL CA(1)' CA(2)' D(n)out D(n+1)out D(n+i)out High-Z RS 2111-n, 0 2111-m, 0 2048 + 64) HN29V51211 Series COH t t CPH CEH CDH t SOH t CDS SAC DF FFH 2 * level COH t ...
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... HN29V51211 Series Serial Read (1) with CA after SC Timing Waveform CE t CES CWC CWC WPH WPH OER OEWS CDE t CDH OES t t SCC WSD t t CDS CDS SPL SCS ...
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... By using program (1), data can be programmed additionally for each sector before erase. t CEH t OEPS t CDSS SCC CDH CDH t SCHW SPL SDH SDS PD0 PD1 PD2111 40H HN29V51211 Series RDY CDS ASP I/ I/ High ...
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... HN29V51211 Series Program (1) with CA before SC and Status Data Polling Timing Waveform CE t CES CWC CWC CWC CWC OEWS WPH WPH WPH WPH CDS CDS CDE t SCS t CDH ...
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... CEH t OEPS t t CDSS SCC CDH t 1 CDH * t t SCHW SPL SDH SDS PD0 PD1 PD2111 40H HN29V51211 Series RDY OE t ASP CDS I/ I/ High ...
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... HN29V51211 Series Program (3) and Status Data Polling Timing Waveform CE t CES OEWS CWC CWC t WPH CDS CDS CDE t CDH SCS I/O0 to I/O7 0FH SA (1) SA (2) RES t High-Z RP RDY /Busy Notes: 1. The programming operation is not guranteed when the number of the SC pulse exceeds 64. ...
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... SCC CDH CDH t SCHW SPL t WSD SDH SDS PD0 PD1 PD2111 40H High-Z t RBSY . OL HN29V51211 Series RDY OE t ASP CDS I/ I/ High ...
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... HN29V51211 Series Program (4) with CA before SC and Status Data Polling Timing Waveform CE t CES CWC CWC CWC CWC OEWS WPH WPH WPH WPH CDS CDS CDE t SCS t t CDH WSD ...
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... RES t RP RDY /Busy Note: 1. The status returns to the standby at the rising edge of CE COH t CDCH CDAC CDAC SCS CDF CDF Device Manufacturer code code High-Z HN29V51211 Series COH Status register 33 ...
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... HN29V51211 Series Data Recovery Read Timing Waveform CE t CES OEWS OER CDH t CDS WP CDE t OES SCS OEL I/O0 to I/O7 01H RES RDY /Busy Notes: 1. The status returns to the standby at the rising edge of CE. 2. Output data is not valid after the number of the SC pulse exceed 2112 in the recovery data read mode. ...
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... The status returns to the standby status after RDY/Busy returns to High- CEH CWC OEPS t WPH t ASP CDS t CDH t t CDH SCHW IO7 = V SA(2) 40H HN29V51211 Series t RDY t CDS IO7 = High ...
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... HN29V51211 Series Function Description Status Register: The HN29V51211 outputs the operation status data as follows: I/O7 pin outputs a V indicate that the memory is in either erase or program operation. The level of I/O7 pin turns the operation finishes. I/O5 and I/O4 pins output V complete in a finite time, respectively. If these pins output V out ...
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... Unusable Sector Initially, the HN29V51211 includes unusable sectors. The unusable sectors must be distinguished from the usable sectors by the system as follows. 1. Check the partial invalid sectors in the devices on the system. The usable sectors were programmed the following data. Refer to the flowchart “Indication of unusable sectors”. ...
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... HN29V51211 Series Requirements for High System Reliability The device may fail during a program, erase or read operation due to write or erase cycles. The following architecture will enable high system reliability if a failure occurs. 1. For an error in read operation: An error correction more than 3-bit error correction per each sector read is required for data reliability ...
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... No Check status Yes Clear status register Load data from external buffer Check status: Status register read END Spare Sectors in Program Error HN29V51211 Series Data recovery read Data recovery write Set another Program start usable sector Program end Check RDY/Busy No Check status ...
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... HN29V51211 Series Memory Structure 2,112 bytes (16,896 bits) Bit: Minimum unit of data. Byte: Input/output data unit in programming and reading. (1 byte = 8 bits) Sector: Page unit in erase, programming and reading. (1 sector = 2,112 bytes = 16,896 bits) Device: 1 device = 32,768 sectors. 40 bit sector byte (8 bits) ...
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... Package Dimensions HN29V51211T Series (TFP-48DA) 12.00 12.40 Max 0.50 *0.22 0.08 0.08 M 0.20 0.06 0.45 Max 0.10 *Dimension including the plating thickness Base material dimension 25 20.00 0.20 Hitachi Code JEDEC EIAJ Mass (reference value) HN29V51211 Series Unit: mm 0.80 0 – 5 0.50 0.10 TFP-48DA Conforms Conforms 0. ...
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... HN29V51211 Series Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document ...