DSPIC30F3011 Microchip Technology Inc., DSPIC30F3011 Datasheet - Page 212
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DSPIC30F3011
Manufacturer Part Number
DSPIC30F3011
Description
Dspic30f3010/3011 Enhanced Flash 16-bit Digital Signal Controller
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC30F3011.pdf
(220 pages)
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dsPIC30F3010/3011
Data Accumulators and Adder/Subtractor
Data Address Space ........................................................... 27
Data EEPROM Memory ...................................................... 53
DC Characteristics ............................................................ 161
Dead-Time Generators ....................................................... 96
Development Support ....................................................... 157
Device Configuration
Device Configuration Registers......................................... 146
Device Overview ................................................................... 7
Divide Support..................................................................... 18
DSP Engine......................................................................... 18
dsPIC30F3010 Port Register Map ...................................... 59
dsPIC30F3011 Port Register Map ...................................... 60
Dual Output Compare Match Mode .................................... 82
E
Edge-Aligned PWM............................................................. 95
Electrical Characteristics................................................... 161
Equations
Errata .................................................................................... 6
DS70141D-page 210
Overflow and Saturation ............................................. 20
Data Space Write Saturation ...................................... 22
Round Logic ................................................................ 21
Write Back................................................................... 21
Alignment .................................................................... 30
Alignment (Figure) ...................................................... 30
Effect of Invalid Memory Accesses ............................. 30
MCU and DSP (MAC Class) Instructions Example..... 29
Memory Map ......................................................... 27, 28
Near Data Space ........................................................ 31
Software Stack ............................................................ 31
Spaces ........................................................................ 30
Width ........................................................................... 30
Erasing ........................................................................ 54
Erasing, Block ............................................................. 54
Erasing, Word ............................................................. 54
Protection Against Spurious Write .............................. 56
Reading....................................................................... 53
Write Verify ................................................................. 56
Writing ......................................................................... 55
Writing, Block .............................................................. 56
Writing, Word .............................................................. 55
BOR .......................................................................... 168
Brown-out Reset ....................................................... 167
I/O Pin Output Specifications .................................... 167
Idle Current (I
Operating Current (I
Power-Down Current (I
Program and EEPROM............................................. 168
Temperature and Voltage Specifications .................. 161
Ranges........................................................................ 96
Register Map............................................................. 148
FBORPOR ................................................................ 146
FGS........................................................................... 146
FOSC ........................................................................ 146
FWDT........................................................................ 146
Multiplier...................................................................... 20
Continuous Pulse Mode .............................................. 82
Single Pulse Mode ...................................................... 82
AC ............................................................................. 169
DC ............................................................................. 161
A/D Conversion Clock ............................................... 126
Baud Rate ................................................................. 119
PWM Period ................................................................ 94
PWM Resolution ......................................................... 94
Serial Clock Rate ...................................................... 112
IDLE
) .................................................... 164
DD
)............................................. 163
PD
) ........................................ 165
Confidential
Exception Processing
Exception Sequence
External Clock Timing Characteristics
External Clock Timing Requirements ............................... 170
External Interrupt Requests ................................................ 45
F
Fast Context Saving ........................................................... 45
Flash Program Memory ...................................................... 47
I
I/O Pin Specifications
I/O Ports.............................................................................. 57
I
I
I
I
Idle Current (I
In-Circuit Serial Programming (ICSP)............................... 135
Independent PWM Output .................................................. 98
Initialization Condition for RCON Register Case 1 ........... 144
2
2
2
2
C 10-bit Slave Mode Operation...................................... 109
C 7-bit Slave Mode Operation........................................ 109
C Master Mode
C Module
Interrupt Priority .......................................................... 42
Trap Sources .............................................................. 43
Type 1, 2, 3, 4 and 5 Timer....................................... 177
Timer1 ...................................................................... 177
Timer2 and Timer 4 .................................................. 178
Timer3 and Timer5 ................................................... 178
In-Circuit Serial Programming (ICSP)......................... 47
Run-Time Self-Programming (RTSP) ......................... 47
Table Instruction Operation Summary ........................ 47
Output ....................................................................... 167
Parallel I/O (PIO) ........................................................ 57
Reception ................................................................. 110
Transmission ............................................................ 110
Reception ................................................................. 109
Transmission ............................................................ 109
Baud Rate Generator ............................................... 112
Clock Arbitration ....................................................... 112
Multi-Master Communication, Bus Collision and
Reception ................................................................. 112
Transmission ............................................................ 111
Addresses................................................................. 109
Bus Data Timing Characteristics
Bus Data Timing Requirements
Bus Start/Stop Bits Timing Characteristics
General Call Address Support .................................. 111
Interrupts .................................................................. 111
IPMI Support............................................................. 111
Master Operation ...................................................... 111
Master Support ......................................................... 111
Operating Function Description ................................ 107
Operation During CPU Sleep and Idle Modes .......... 112
Pin Configuration ...................................................... 107
Programmer’s Model ................................................ 107
Register Map ............................................................ 113
Registers .................................................................. 107
Slope Control ............................................................ 111
Software Controlled Clock Stretching (STREN = 1) . 110
Various Modes.......................................................... 107
Bus Arbitration .................................................. 112
Master Mode..................................................... 190
Slave Mode....................................................... 192
Master Mode..................................................... 191
Slave Mode....................................................... 192
Master Mode..................................................... 190
Slave Mode....................................................... 192
IDLE
) ............................................................ 164
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