RS5C313 RICOH Co.,Ltd., RS5C313 Datasheet - Page 10

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RS5C313

Manufacturer Part Number
RS5C313
Description
Ultra-compact Real-time Clock Ic
Manufacturer
RICOH Co.,Ltd.
Datasheet

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10
RS5C313
2.1-6 (CTFG)
The CTFG bit is set to 1 when interrupt pulses are output from the INTR pin held at the low level.
There are two interrupt modes selectable: the pulse mode (when the CT
the CT
The CTFG bit can be set only when the CT
level while setting the CTFG bit to 0 turns off the INTR pin.
*
*
*
CT
*
2)
3)
4)
1) The symbol “
0
0
0
0
1
1
1
1
1
1
1
1
3
Interrupt cycle register
3
bit is set to 1).
CT
*
*
*
*
0
0
0
0
1
1
1
1
*
CTFG
CTFG
CTFG
2
INTR
INTR
INTR
1
*
” in the above table indicates 0 or 1.
CT
0
0
1
1
0
0
1
1
0
0
1
1
1
(Second count-up)
CT
Interrupt
0
1
0
1
0
1
0
1
0
1
0
1
0.488ms
0
Outputs from
INTR pin
OFF
ON
0.977ms
0.5s
1 second
10 seconds
1 minute
10 minutes
1 hour
1 day
1 week
1 month
0.977ms
0.5s
(Second count-up)
3
Interrupt
is set to 1. Setting the CTFG bit to 1 switches the INTR pin to the low
Interrupt disabling
Fixing INTR pin at low level
Cycle: 0.977 ms (1/1024 Hz), Duty: 50% *
Cycle: 0.5 s (1/2 Hz)*
Every second*
Every 10 seconds (For display of second digits: 00, 10, 20, 30, 40, and 50)
Every minute (00 second)*
Every 10 minutes (00 second) (For display of minute digits: 00, 10, 20, 30, 40, and 50)*
Every hour (00 minute and 00 second)*
Every day (0 hour, 00 minute, and 00 second a.m.)*
Every week (0 week, 0 hour, 00 minute, and 00 second a.m.)*
Every month (1st day, 0 hour, 00 minute, and 00 second a.m.)*
Setting CTFG bit to 0
4
3
3
bit is set to 0) and the level mode (when
Remarks
4
4
2
4
*
4
4
4
4

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