HY27SA161G1M Hynix Semiconductor, HY27SA161G1M Datasheet - Page 30

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HY27SA161G1M

Manufacturer Part Number
HY27SA161G1M
Description
1gbit 128mx8bit / 64mx16bit Nand Flash Memory
Manufacturer
Hynix Semiconductor
Datasheet
Note: (1). The time to Ready depends on the value of the pull-up resistor tied to the Ready/Busy pin. See Figures 32, 33 and 34.
Rev 0.5 / Oct. 2004
t
t
t
Symbol
WHBL
WHRL
WLWL
CLE
ALE
I/O
WE
CE
Alt.
(2). To break the sequential read cycle, CE must be held High for longer than t
(3). ES = Electronic Signature.
Symbol
t
t
t
WB
WHR
WC
(CE Setup time)
(ALE Setup time)
(CLE Setup time)
tELWL
tALLWL
tCLHWL
Write Enable High to Ready/Busy Low
Write Enable High to Read Enable Low
Write Enable Low to
Write Enable Low
(Data Setup time)
tDVWH
Figure 21. Command Latch AC Waveforms
Parameter
1Gbit (128Mx8bit / 64Mx16bit) NAND Flash
Command
Write Cycle time
tWLWH
(CE Hold time)
(CLE Hold time)
(Data Hold time)
HY27UA(08/16)1G1M Series
HY27SA(08/16)1G1M Series
tWHEH
(ALE Hold time)
tHWCLL
EHEL
tWHDX
tWHALH
.
Max
Min
Min
Device
3.3V
60
100
60
Device
1.8V
80
Unit
ns
ns
ns
30

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