CDK8307 Cadeka Microcircuits LLC., CDK8307 Datasheet - Page 10

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CDK8307

Manufacturer Part Number
CDK8307
Description
12/13-bit, 20/40/50/65/80msps, Eight Channel, Ultra Low Power Adc With Lvds
Manufacturer
Cadeka Microcircuits LLC.
Datasheet
PRELIMINARY Data Sheet
Electrical Characteristics
(AVDD = 1.8V, DVDD = 1.8V, OVDD = 1.8V, 50MSPS clock, 50% clock duty cycle, -1dBFS 8MHz input signal, 14-bit output, unless otherwise noted)
Electrical Characteristics - CDK8307A
(AVDD = 1.8V, DVDD = 1.8V, OVDD = 1.8V, 20MSPS clock, 50% clock duty cycle, -1dBFS 8MHz input signal, 14-bit output, unless otherwise noted)
©2009 CADEKA Microcircuits LLC
Symbol
DC Accuracy
Analog Input
Power Supply
Symbol
Performance
Power Supply
Clock Inputs
DNL
INL
V
V
V
AVDD
DVDD
OVDD
SNR
SINAD
SFDR
HD2
HD3
ENOB
Crosstalk
CMO
CMI
FSR
Parameter
Parameter
No Missing Codes
Offset Error
Gain Error
Gain Matching
Differential Non-Linearity
Integral Non-Linearity
Common Mode Voltage Output
Input Common Mode
Full Scale Range
Input Capacitance
Bandwidth
Analog Supply Voltage
Digital Supply Voltage (up to 65MSPS)
Digital Supply Voltage (above 65MSPS)
Digital CMOS Input Supply Voltage
Signal to Noise Ratio
Signal to Noise and Distortion Ratio
Spurious Free Dynamic Range
Second order Harmonic Distortion
Third order Harmonic Distortion
Effective number of Bits
Analog supply current
Digital supply current
Analog power Dissipation
Digital power Dissipation
Total power Dissipation
Power Down Dissipation
Sleep Mode Dissipation
Sleep Channel Mode Dissipation
Sleep Channel Mode Savings
Maximum Conversion Rate
Minimum Conversion Rate
Conditions
Conditions
Offset error after digital offset cancellation
Gain matching between channels. ±3sigma
value at worst case conditions.
12-bit level
12-bit level
Analog input common mode voltage
Differential input voltage range
Differential input capacitance
Input bandwidth
Digital and output driver supply voltage
Digital and output driver supply voltage
F
F
F
F
F
See note (1) on page 13
Digital and output driver supply
Power down mode
Deep sleep mode
All channels. in sleep ch. mode (light sleep)
Power dissipation savings per channel off
IN
IN
IN
IN
IN
= 8MHz
= 8MHz
= 8MHz
= 8MHz
= 8MHz
V
CM
Min
Min
500
-6
1.7
1.7
1.8
1.7
20
-0.1
Guaranteed
V
Typ
±0.5
±0.2
±0.6
AVDD
Typ
2.0
72.2
71.5
11.6
180
1.8
1.8
1.9
1.8
1
2
82
95
82
95
47
54
84
97
10
30
46
17
/2
www.cadeka.com
V
CM
Max
Max
2.0
2.0
2.0
3.6
6
15
+0.2
Units
Units
%FS
%FS
MHz
MSPS
MSPS
LSB
LSB
LSB
dBFS
dBFS
V
mW
mW
mW
mW
mW
mW
pF
dBc
dBc
dBc
bits
dBc
mA
mA
μW
V
V
pp
V
V
V
V
10

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