ATA6020N ATMEL Corporation, ATA6020N Datasheet - Page 51

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ATA6020N

Manufacturer Part Number
ATA6020N
Description
Low-current Microcontroller For Watchdog Function
Manufacturer
ATMEL Corporation
Datasheet

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5.2.7.13
5.2.7.14
5.2.7.15
4708D–4BMCU–09/05
Serial Interface Status and Control Register (SISC)
Serial Transmit Buffer (STB) – Byte Write
Serial Receive Buffer (SRB) – Byte Read
The STB is the transmit buffer of the SSI. The SSI transfers the transmit buffer into the shift reg-
ister and starts shifting with the most significant bit.
The SRB is the receive buffer of the SSI. The shift register clocks serial data in (most significant
bit first) and loads content into the receive buffer when complete telegram has been received.
RACK
TACK
SIM
IFN
SRDY
ACT
SISC
SISC
STB
SRB
write
read
First write cycle
Second write cycle
First read cycle
Second read cycle
Receive ACKnowledge status/control bit for MCL mode
RACK = 0, transmit acknowledge in next receive telegram
RACK = 1, transmit no acknowledge in last receive telegram
Transmit ACKnowledge status/control bit for MCL mode
TACK = 0, acknowledge received in last transmit telegram
TACK = 1, no acknowledge received in last transmit telegram
Serial Interrupt Mask
SIM = 1, disable interrupts
SIM = 0, enable serial interrupt. An interrupt is generated.
Interrupt FuNction
IFN = 1, the serial interrupt is generated at the end of the telegram
IFN = 0, the serial interrupt is generated when the SRDY goes low
Serial interface buffer ReaDY status flag
SRDY = 1, in receive mode: receive buffer empty in transmit mode: transmit buffer full
SRDY = 0, in receive mode: receive buffer full in transmit mode: transmit buffer empty
Transmission ACTive status flag
ACT = 1, transmission is active, i.e., serial data transfer. Stop or start
ACT = 0, transmission is inactive
Bit 3
(i.e., buffer becomes empty/full in transmit/receive mode)
conditions are currently in progress.
Bit 2
RACK
TACK
Bit 7
Bit 3
Bit 3
Bit 7
Bit 1
SIM
ACT
Bit 6
Bit 2
Bit 2
Bit 6
Bit 0
IFN
SRDY
Bit 5
Bit 1
Bit 1
Bit 5
Primary register address: ’A’hex
Reset value: 1111b
Reset value: xxxxb
Bit 4
Bit 0
Bit 0
Bit 4
Primary register address: ’9’hex
Primary register address: ’9’hex
Reset value: xxxxb
Reset value: xxxxb
Reset value: xxxxb
Reset value: xxxxb
ATA6020N
51

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