ATA6020N ATMEL Corporation, ATA6020N Datasheet - Page 29

• Manufacturer Part Number: ATA6020N
• Description: Low-current Microcontroller For Watchdog Function
• Manufacturer: ATMEL Corporation

5.2.5.1
4708D–4BMCU–09/05
Timer 1 Control Register 1 (T1C1)
Bit 3 = MSB, Bit 0 = LSB
The three bits T1C[2:0] select the divider for Timer 1. The resulting time interval depends on this
divider and the timer 1 input clock source. The timer input can be supplied by the system clock
or via clock management. If the clock management generates the SUBCL, the selected input
clock from the RC oscillator or an external clock is divided by 16
Table 5-5.
Note:
T1C1
T1RM
T1C2
T1C1
T1C0
T1C2
0
0
0
0
1
1
1
1
Tin: input clock period = 1/Cin (see
T1C1
Bit 3
T1RM
Timer 1 Restart Mode
Note: If WDL = 0, Timer 1 restart is impossible
Timer 1 Control bit 2
Timer 1 Control bit 1
Timer 1 Control bit 0
0
0
1
1
0
0
1
1
Timer 1 Control Bits
T1C0
Bit 2
T1C2
0
1
0
1
0
1
0
1
Divider
16384
2048
256
16
32
Bit 1
T1C1
2
4
8
T1RM = 0, write access without Timer 1 restart
T1RM = 1, write access with Timer 1 restart
Time Interval with SUBCL from
Figure 4-12 on page
Bit 0
T1C0
Clock Management
Tin
Tin
Tin
Tin
Tin
Tin
Tin
Tin
Address: '7'hex – Subaddress: '8'hex
Reset value: 1111b
262144
32768
4096
128
256
512
64
32
15)
Time Interval with SYSCL
8192 µs/16384 µs
1024 µs/2048 µs
ATA6020N
128 µs/256 µs
16 µs/32 µs
= 2/1 MHz
8 µs/16 µs
1 µs/2 µs
2 µs/4 µs
4 µs/8 µs
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