PM5380-BI PMC-Sierra, Inc., PM5380-BI Datasheet - Page 192

• Manufacturer Part Number: PM5380-BI
• Description: Network Interface, SATURN User Network Interface (8x155) Telecom Standard Product
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
Register 0x041, 0x141, 0x241, 0x341, 0x441, 0x541, 0x641, 0x741:
This register allows control over the transmitted payload pointer for diagnostic purposes.
PSE:
NSE:
NOTE: NSE and PSE bits are for diagnosis purposes and only operational in normal line
transmission (non-APS).NDF:
PLD:
TPOP Pointer Control
The PSE bit controls the insertion of positive pointer movements. A zero to one transition
on this bit enables the insertion of a single positive pointer justification in the outgoing
stream. This register bit is automatically cleared when the pointer movement is inserted.
The NSE bit controls the insertion of negative pointer movements. A zero to one transition
on this bit enables the insertion of a single negative pointer justification in the outgoing
stream. This register bit is automatically cleared when the pointer movement is inserted.
The NDF bit controls the insertion of new data flags in the inserted payload pointer. When
a logic one is written to this bit position, the pattern contained in the NDF[3:0] bit positions
in the TPOP Arbitrary Pointer MSB Register is inserted continuously in the payload pointer.
When a logic zero is written to this bit position, the normal pattern (0110) is inserted in the
payload pointer.
The PLD bit controls the loading of the pointer value contained in the TPOP Arbitrary
Pointer Registers. Normally the TPOP Arbitrary Pointer Registers are written to set up the
arbitrary new pointer value, the S-bit values, and the NDF pattern. A logic one is then
written to this bit position to load the new pointer value. The new data flag bit positions are
set to the programmed NDF pattern for the first frame; subsequent frames have the new data
flag bit positions set to the normal pattern (0110) unless the NDF bit described above is set
to a logic one.
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
Reserved
FTPTR
SOS
PLD
NDF
NSE
PSE
Reserved
S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Default
0
0
0
0
0
0
0
0
Released
192