PM5361-RI PMC-Sierra, Inc., PM5361-RI Datasheet - Page 57

• Manufacturer Part Number: PM5361-RI
• Description: SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR
• Manufacturer: PMC-Sierra, Inc.

DATA SHEET
PMC-920526
Register 20H, 40H, 60H: TU3, or TU #1 in TUG2 #1, Configuration and Status
In TU3 mode (TU3 bit in TPP Configuration register set high), this register
reports the status and configures operational modes of the TU3 mapped into a
TUG3 handled by the TPP . Out of TU3 mode, this register reports the status and
configures the operational modes of TU #1 in TUG2 #1.
IPAIS:
IIDLE:
DLOP:
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
The IPAIS bit enables the insertion of path AIS for tributary TU #1 in TUG2 #1
or TU3 depending on whether the TPP is in TU3 mode. Tributary path AIS is
inserted by forcing all ones into all tributary bytes. The IPAIS bit has
precedence over the IIDLE and the DLOP bits.
The IIDLE bit enables the insertion of path idle for tributary TU #1 in TUG2 #1
or TU3 depending on whether the TPP is in TU3 mode. Tributary idle is
inserted with the idle code in the tributary bytes, except for a valid pointer and
a valid V5 byte that tags the tributary as unequipped. The idle code is
selectable to be all zeros or all ones as controlled by the ICODE bit. In order
for the C2 byte to be labelled unequipped, the ICODE bit must be set low in
TU3 mode. The IIDLE bit has no effect when the IPAIS bit is set high.
The DLOP bit allows downstream pointer processing elements to be
diagnosed. When DLOP is set high, the new data flag (NDF) field of the
outgoing payload pointer in tributary TU #1 in TUG2 #1 or TU3 depending on
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
ISSUE 8
CONFIG[1]
CONFIG[0]
Function
LOPV
LOPE
DLOP
IIDLE
IPAIS
PF
Default
1
1
0
0
0
0
0
0
TRIBUTARY UNIT PAYLOAD PROCESSOR
49
PM5361 TUPP