PM5361-RI PMC-Sierra, Inc., PM5361-RI Datasheet - Page 50
PM5361-RI
Manufacturer Part Number
PM5361-RI
Description
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR
Manufacturer
PMC-Sierra, Inc.
Datasheet
1.PM5361-RI.pdf
(108 pages)
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DATA SHEET
PMC-920526
NOFILT:
ICODE:
TPPEN:
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
disabled; data written is ignored and read data is invalid. When not in TU3
mode, register 60H reflects status and configuration of TUG2 #1, TU #1 and
register 67H reflect LOP interrupt status of TU #1 in all seven TUG #2s.
The NOFILT bit controls the processing of incoming tributary pointers. When
a logic 0 is written to this location, illegal variations from normal tributary
pointer value (i.e. changes which do not correspond to pointer justification
events, and are not accompanied by a new data flag) are ignored unless a
consistent new value is received three times consecutively. When a logic 1 is
written to this location, variations take effect immediately and are passed
through the payload buffer unfiltered.
The ICODE bit controls the value inserted into tributary bytes when idle
insertion is enabled. When a logic 0 is written to this location, the idle code is
chosen to be all zeros. Setting ICODE to 1 sets the idle code to all ones.
Regardless of the idle code selected, a valid pointer and a valid V5 byte that
tags the tributary as unequipped is inserted. In TU3 mode, ICODE must be
set to 0 for the C2 byte to indicate unequipped.
When set high, the TPPEN bit enables the operation of tributary payload
processor #3. When TPPEN is low, TPP #3 is held in a low power, reset
state. The data destined for TPP #3 is re-transmitted unchanged on the
outgoing data stream. The amount of delay from the incoming to the outgoing
data stream is a function of the separation between the IC1J1 and OC1J1
inputs. See the bypass functional timing diagram for details.
ISSUE 8
TRIBUTARY UNIT PAYLOAD PROCESSOR
42
PM5361 TUPP
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