STE2004SDIE2 STMicroelectronics, STE2004SDIE2 Datasheet - Page 50

• Manufacturer Part Number: STE2004SDIE2
• Description: 102 x 65 single-chip LCD controller/driver
• Manufacturer: STMicroelectronics

Instruction set
5.1
50/79
Table 21. Partial display configuration
Table 22. N-Line inversion
Reset (RES)
At power-on, all internal registers are configured with the default value. The RAM content is
not defined. A reset pulse on the RES pad (active low) re-initializes the internal registers
content see
reset pulse is applied. After the power-on, the software reset instruction can be used to re-
load the reset configuration into the internal registers.
The default configuration is:
– Horizontal addressing (V = 0)
– Normal instruction set (H[1:0] = 0)
– Normal display (MX = MY = 0)
– Display blank (E = D = 0)
– Address counter X[6: 0] = 0 and Y[4: 0] = 0
– Temperature coefficient (TC[1: 0] = 0)
– Bias system (BS[2: 0] = 0)
A memory blank instruction can be used to clear the DDRAM content.
NW3
PD2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
:
NW2
PD1
Table 10.
0
0
1
1
0
0
1
1
0
0
0
0
1
1
:
NW1
PD0
All on-going communication with the host controller is interrupted if a
0
1
0
1
0
1
0
1
0
0
1
1
1
1
:
NW0
Section 1
0
1
0
1
0
1
:
16
16
16
0
8
8
0
8
0-Line inversion
(Frame inversion)
2-Line inversion
3-Line inversion
4-Line inversion
:
15-Line inversion
16-Line inversion
Description
– Multiplexing ratio (M[1:0]=0 - MUX 65)
– Frame rate (FR[1:0]=”75Hz”)
– Power down (PD = 1)
– Dual partial display disabled (PE=0)
– V
– Y-CARRIAGE=8
– X-CARRIAGE=101
OP
16 + Icon row
16 + Icon row
16 + Icon row
8 + Icon row
0 + Icon row
8 + Icon row
0 + Icon row
8 + Icon row
Section 2
=0
Reset state
Reset state
0000
000
STE2004S