MSAN-107 Zarlink Semiconductor, Inc., MSAN-107 Datasheet - Page 8

• Manufacturer Part Number: MSAN-107
• Description: Understanding and Eliminating Latch-Up in CMOS Applications
• Manufacturer: Zarlink Semiconductor, Inc.

MSAN-107
accordance with the charge sharing between C
C
C
connection, the voltage at the nominal 5V rail will
jump up by the amount of voltage initially present at
the ground point (i.e. almost 12V). This results in an
over-voltage condition being applied to the devices
supplied by the 5V rail.
exceeds the absolute maximum rating for these
devices then latch-up may be triggered by the
avalanche breakdown mechanism described in an
earlier section. This problem is more likely to be
evident in systems with power supplies differing
greatly in magnitude since potential over-voltages
can become quite large.
telephone switching system which would typically
contain a -48V supply as well as +5V and other
supply voltages.
This problem can also be overcome by indenting the
edge terminals on PCB’s. In this case, there must be
more than one level of indentation to ensure that the
power supply connections are made in a sequence
that will alleviate this problem. The safest way to
accomplish this is to have power supply connections
made in the order of ascending voltage magnitude
(Fig. 11).
supply and 12V supplies, the ground line should
make connection first, the +5V supply next and
finally, the +12V and -12V supplies at the same time.
This ascending order of magnitudes ensures that no
over-voltages occur even if one of the power supplies
pulls the other through the decoupling capacitors.
The ground line should always make connection first
to ensure that a positive supply does not pull a
negative one or vice versa. Connecting opposing
power supplies (e.g.
ensure cancellation of the effects of their connection.
A-38
Figure 11 - Multi-Level Indentations of I/O Edge
2
1
.
»
C
2
This voltage could approach 12 volts since
.
PRINTED CIRCUIT
When
For example, in a system with a +5V
BOARD
INPUTS/OUTPUTS
TO CIRCUIT
the
Terminals
12V) at the same time will
ground
A prime example is a
+12V
If the applied voltage
+12V
+5V
GND
GND
terminal
makes
1
anc
In systems which have
supplies to contend with, it may not be feasible to
provide the required number of indentations on the
PCB.
decoupling used must be done to establish potential
problem
capacitors on different supplies should be of equal
magnitude. This will tend to minimize over-voltages
dues
capacitors.
been taken, there is still a possibility of power supply
over-voltages occurring, then it may be necessary to
provide some form of current limiting or local
regulation to prevent circuit damage.
The simplest form of protection is to connect a
resistor in series with the power supply (V
pin of the devices in question (Fig. 12a). The size of
this resistor can be chosen to either prevent latch-up
from occurring or to prevent circuit damage when
latch-up does occur. If latch-up is to be prevented
then the minimum resistor value is chosen as
follows:
where
This will ensure that V
device.
To simply prevent damage due to latch-up, the
resistor is chosen to limit the supply current to a few
hundred milliamps at the maximum applied voltage.
There are a few factors which must be taken into
consideration when the maximum value for this
resistor is selected. The source impedance of the
power supply will be increased by the amount of the
added resistance. This will result in a decrease in
the current sourcing or sinking capacity of the
device, depending on whether the resistor is in the
V
corresponding increase in the output propagation
delay, proportional to product of the protection
resistor and the load capacitance. Finally there is a
decrease in the noise immunity of the device
proportional to the product of this resistor and the
total instantaneous supply current (including the
output currents).
MD74SCXXX, it is recommended that this resistor be
placed in the V
noise immunity for high level outputs (when driving
TTL or other MD74SCXXX devices).
DD
or V
R =
to
In this case, a careful analysis of the
areas.
V
V
I
SS
DD
equal
Supply
DD
If after all possible precautions have
Max
Max
line respectively.
V
DD
=
Supply
=
=
charge
line as there is more available
Where
I
DD
DD
For devices such as the
Maximum Supply Voltage
Generated
Absolute Maximum Rating
for V
Supply Current at V
Max
- V
Max
large number of power
is never exceeded at the
DD
sharing
DD
Application Note
possible,
Max
There is also a
between
decoupling
DD
DD
or V
Max
the
SS
)