HFA3861AIN Intersil Corporation, HFA3861AIN Datasheet - Page 24
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HFA3861AIN
Manufacturer Part Number
HFA3861AIN
Description
Processor, Direct Sequence Spread Spectrum Base band Processor
Manufacturer
Intersil Corporation
Datasheet
1.HFA3861AIN.pdf
(37 pages)
Bits 7:4
Bits 3
Bit 2
Bits 1:0
Bits 7:0
Bits 7:0
Bits 7:0
Bit 7
Bits 6:5
Bit 4
Bit 3
Bit 2
Bit:1
Bit 0
Bit 7
Bit 6
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Select preamble mode
0 = Normal, long preamble interoperable with 1 and 2Mbps legacy equipment
1= short preamble and header mode (optional in 802.11)
Reserved, must be set to 0
TX data Rate. Must be set at least 2µs before needed in TX frame. This selects TX signal field code from the registers above.
00 = DBPSK - 11 chip sequence (1Mbps)
01 = DQPSK - 11 chip sequence (2Mbps)
10 = CCK - 8 chip sequence (5.5Mbps)
11 = CCK - 8 chip sequence (11Mbps)
R/W but not currently used internally. Bit 7 may be employed by the MAC in 802.11 situations to resolve an ambiguity in the
length field when in the 11Mbps mode. Bit 2 should be set to a 1 where the reference oscillator of the radio is common for both
the carrier frequency and the data clock. All other bits should be set to 0 to insure compatibility.
This 8-bit register contains the higher byte (bits 8-15) of the transmit Length Field described in the Header. This byte combined
with the lower byte indicates the number of microseconds the data packet will take.
This 8-bit register contains the lower byte (bits 0-7) of the transmit Length Field described in the Header. This byte combined
with the higher byte indicates the number of microseconds the data packet will take.
CCA sample mode time
0 = 19.9 µs
1 = 15.8 µs
CCA mode
00 - CCA is based only on ED
01 - CCA is based on (CS1 OR SQ1/CS2)
10 - CCA is based on (ED AND (CS1 OR SQ1/CS2))
11 - CCA is based on (ED OR (CS1 | SQ1/CS2))
TX test modes
0 = Alternating bits for carrier suppression test. (Needs scrambler off (CR32 <2> = 1)).
1 = all chips set to 1 for CW carrier. This allows frequency measurement
Enable TX test modes
0 = normal operation
1 = Invoke tests described by bit 4
Antenna choice for TX
0 = Set AntSel low
1 = Set AntSel high
TX Antenna Mode
0 = set AntSel pin to value in bit 2
1 = set AntSel pin to antenna for which last valid header CRC occurred
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Initial CS2 estimate
0 = Use dot product result
1 = Use SQ1 from Barker correlator peaks
see CR30 and CR48 for related thresholds
CIR estimate/ Dot product clock control.
0 = on during acquisition
1 = only on after detect.
CONFIGURATION REGISTER 7 ADDRESS (0Eh) R/W TX LENGTH FIELD (HIGH)
CONFIGURATION REGISTER 8 ADDRESS (10h) R/W TX LENGTH FIELD (LOW)
24
CONFIGURATION REGISTER 6 ADDRESS (0Ch) R/W TX SERVICE FIELD
CONFIGURATION REGISTER 5 ADDRESS (0Ah) R/W TX SIGNAL FIELD
CONFIGURATION REGISTER 10 ADDRESS (14h) R/W RX CONFIGURE
CONFIGURATION REGISTER 9 ADDRESS (12h) R/W TX CONFIGURE
HFA3861A