TMP86xy49UG/F/NG Toshiba, TMP86xy49UG/F/NG Datasheet - Page 225

• Manufacturer Part Number: TMP86xy49UG/F/NG
• Manufacturer: Toshiba

Specifications of TMP86xy49UG/F/NG

• Package: LQFP64/QFP64/SDIP64
• Rom Types (m=mask,p=otp,f=flash): M/P/F
• Rom Size: 16/32/60
• Ram Size: 512/1K/2K
• Driver Led: 13
• Driver Lcd: -
• Spi/sio Channels: 2
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 56
• Power Supply (v): 4.5 to 5.5

16.6 Data Transfer of I2C Bus
16.6.4 Stop condition generation
Note: In the slave mode, if the slave address set in I2CAR is "00H", a START Byte "01H" in I
Table 16-4 Operation in the Slave Mode
PIN, and clear “0” to the BB. Do not modify the contents of the MST, TRX, BB, PIN until a stop condition is
generated on a bus.
dition after they release a SCL line.
TRX
1
0
device detects slave address match and the TRX is set to "1".
When the BB is “1”, a sequence of generating a stop condition is started by setting “1” to the MST, TRX and
When a SCL line on a bus is pulled-down by other devices, a serial bus interface circuit generates a stop con-
The time from the releasing SCL line until the generating the STOP condition takes t
and the AD0 (Bit1 in the SBISRB) and implements processes according to conditions listed in " Table 16-
4 Operation in the Slave Mode ".
Check the AL (Bit3 in the SBISRB), the TRX (Bit6 in the SBISRB), the AAS (Bit2 in the SBISRB),
AL
1
0
1
0
AAS
1
1
0
1
0
1
0
AD0
1/0
1/0
1/0
0
0
0
0
A serial bus interface circuit loses arbitra-
tion when transmitting a slave address.
And receives a slave address of which the
value of the direction bit sent from another
master is "1".
In the slave receiver mode, a serial bus
interface circuit receives a slave address
of which the value of the direction bit sent
from the master is "1".
In the slave transmitter mode, 1-word data
is transmitted.
A serial bus interface circuit loses arbitra-
tion when transmitting a slave address.
And receives a slave address of which the
value of the direction bit sent from another
master is "0" or receives a "GENERAL
CALL".
A serial bus interface circuit loses arbitra-
tion when transmitting a slave address or
data. And terminates transferring word
data.
In the slave receiver mode, a serial bus
interface circuit receives a slave address
of which the value of the direction bit sent
from the master is "0" or receives "GEN-
ERAL CALL".
In the slave receiver mode, a serial bus
interface circuit terminates receiving of 1-
word data.
Conditions
Page 208
Set the number of bits in 1 word to the BC
and write transmitted data to the SBIDBR.
Test the LRB. If the LRB is set to "1", set
the PIN to "1" since the receiver does not
request next data. Then, clear the TRX to
"0" to release the bus. If the LRB is set to
"0", set the number of bits in 1 word to the
BC and write transmitted data to the
SBIDBR since the receiver requests next
data.
Read the SBIDBR for setting the PIN to
"1" (Reading dummy data) or write "1" to
the PIN.
A serial bus interface circuit is changed to
slave mode. To clear AL to "0", read the
SBIDBR or write the data to SBIDBR.
Read the SBIDBR for setting the PIN to
"1" (Reading dummy data) or write "1" to
the PIN.
Set the number of bits in 1-word to the BC
and read received data from the SBIDBR.
Process
2
C bus standard is recived, the
LOW
.
TMP86PM49UG