74LVC2G125DC,125 NXP Semiconductors, 74LVC2G125DC,125 Datasheet - Page 16
![IC BUS BUFF DVR TRI-ST DL 8VSSOP](/photos/6/94/69485/8-vssop_sot765-1_sml.jpg)
74LVC2G125DC,125
Manufacturer Part Number
74LVC2G125DC,125
Description
IC BUS BUFF DVR TRI-ST DL 8VSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet
1.74LVC2G125DC125.pdf
(22 pages)
Specifications of 74LVC2G125DC,125
Package / Case
US8, 8-VSSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LVC
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
40 uA
Low Level Output Current
32 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
2.7 ns (Typ) @ 2.7 V or 2.3 ns (Typ) @ 3 V to 3.6 V or 1.9 ns (Typ) @ 4.5 V to 5.5 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVC2G125DC-G
74LVC2G125DC-G
935274507125
74LVC2G125DC-G
935274507125
NXP Semiconductors
Fig 15. Package outline SOT902-1 (XQFN8U)
74LVC2G125
Product data sheet
XQFN8U: plastic extremely thin quad flat package; no leads;
8 terminals; UTLP based; body 1.6 x 1.6 x 0.5 mm
DIMENSIONS (mm are the original dimensions)
UNIT
mm
SOT902-1
VERSION
OUTLINE
not for soldering
metal area
max
0.5
A
terminal 1
index area
terminal 1
index area
0.05
0.00
A
L
1
1
3
2
1
0.25
0.15
b
IEC
- - -
L
1.65
1.55
D
e
1.65
1.55
E
4
8
D
0.55
MO-255
JEDEC
e
0
All information provided in this document is subject to legal disclaimers.
e
REFERENCES
0.5
e
1
Rev. 11 — 9 September 2010
0.35
0.25
L
5
6
7
B
b
0.15
0.05
JEITA
L
- - -
1
e
e
A
E
scale
1
1
1
∅ v
∅ w
0.1
v
M
M
C
C
0.05
w
A
B
0.05
y
A
2 mm
0.05
y
A
y
1
1
1
Dual bus buffer/line driver; 3-state
C
PROJECTION
EUROPEAN
detail X
74LVC2G125
X
C
© NXP B.V. 2010. All rights reserved.
y
ISSUE DATE
05-11-25
07-11-14
SOT902-1
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