LMH1983SQE/NOPB National Semiconductor, LMH1983SQE/NOPB Datasheet - Page 14

• Manufacturer Part Number: LMH1983SQE/NOPB
• Description: IC VID CLK GEN MULTI RATE 40LLP
• Manufacturer: National Semiconductor
• Type: Clock Generatorr

Specifications of LMH1983SQE/NOPB

• Applications: Video Equipment
• Mounting Type: Surface Mount
• Package / Case: 40-LLP
• Leaded Process Compatible: Yes
• Rohs Compliant: Yes
• Interface Type: I2C
• Supply Voltage (max): 3.3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMH1983SQETR

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ADD
0x11
0x12
Name
Alignment Control –
TOF1
Alignment Control –
TOF2
Bits
7:6
5:4
3
2
1
0
7:6
5:4
3:1
0
Field
RSVD
TOF1_Align_Mode
TOF1_Sync_Near
TOF1_Sync_Far
TOF1_Sync_Slew
RSVD
RSVD
TOF2_Align_Mode
RSVD
TOF2_INIT
14
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
11
1
0
0
11
0
Description
Reserved
00 = Auto-align when misaligned
01 = Reserved
10 = Always Align
11 = Never Align
NOTE: When H_ONLY is 1, TOF1 align
mode is forced to never align.
This bit sets the PLL1/TOF1 output
synchronization behavior when the same
reference is reapplied following a momentary
LOR condition and TOF1 is within 2 lines of
the expected location.
0 = Drift Lock – ensures the outputs drift
smoothly back to frame alignment without
excessive output phase disturbances
1 = Crash Lock – achieves the fastest frame
alignment through PLL/TOF counter resets,
which can result in output phase
disturbances
This bit sets the PLL1/TOF1 output
synchronization behavior when the same
reference is reapplied following a momentary
LOR condition and TOF1 is within 2 lines of
the expected location.
0 = Drift Lock – ensures the outputs drift
smoothly back to frame alignment without
excessive output phase disturbances
1 = Crash Lock – achieves the fastest frame
alignment through PLL/TOF counter resets,
which can result in output phase
disturbances
Sets the direction that TOF1 slews to achieve
frame alignment when a new reference is
applied and TOF1 is outside of 2 lines of the
expected location.
0 = TOF1 lags by railing the VCXO input low
1 = TOF1 advances by railing the VCXO input
high
Reserved
Reserved
00 = auto align when misaligned
01 = one shot manual align when writing
TOF2_INIT=1
10 = always align
11 = never align
Reserved
Writing one to this bit while also writing
TOF2_Align_Mode = 3, will cause the
TOF2_INIT output to go high for at least one
vframe period + one Hsync period and not
more than one vframe period + two Hsync
periods. The assertion of TOF2_INIT must
happen immediately (it cannot wait for
Hsync). If TOF2_Align_Mode is being written
to 3, this bit will have no effect. This bit is self-
clearing and will always read zero.