73S1210F Maxim, 73S1210F Datasheet - Page 43
73S1210F
Manufacturer Part Number
73S1210F
Description
The 73S1210F is a versatile and economical CMOS system-on-chip (SoC) device intended for smart card reader applications
Manufacturer
Maxim
Datasheet
1.73S1210F.pdf
(126 pages)
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DS_1210F_001
•
The
Serial Interface 0 Control Register (S0CON): 0x9B 0x00
Transmit and receive data are transferred via this register.
Rev. 1.4
S0CON.7
S0CON.6
S0CON.5
S0CON.4
S0CON.3
S0CON.2
S0CON.1
S0CON.0
Mode 3
The only difference between Mode 2 and Mode 3 is that in Mode 3 either internal baud rate generator
or timer 1 can be use to specify baud rate.
S0BUF
Bit
MSB
register is used to read/write data to/from the serial 0 interface.
SM0
Symbol
REN0
SM20
RB80
TB80
SM0
SM1
RI0
TI0
SM1
These two bits set the UART0 mode:
Enables the inter-processor communication feature.
If set, enables serial reception. Cleared by software to disable reception.
The 9th transmitted data bit in Modes 2 and 3. Set or cleared by the MPU,
depending on the function it performs (parity check, multiprocessor
communication etc.).
In Modes 2 and 3 it is the 9th data bit received. In Mode 1, if SM20 is 0,
RB80 is the stop bit. In Mode 0 this bit is not used. Must be cleared by
software.
Transmit interrupt flag, set by hardware after completion of a serial transfer.
Must be cleared by software.
Receive interrupt flag, set by hardware after completion of a serial
reception. Must be cleared by software.
Mode
SM20
0
1
2
3
Table 38: The S0CON Register
REN0
Description
8-bit UART
9-bit UART
9-bit UART
N/A
TB80
Function
SM0
RB80
0
0
1
1
TI0
SM1
0
1
0
1
73S1210F Data Sheet
RI0
LSB
43
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