73S1210F Maxim, 73S1210F Datasheet - Page 29

• Manufacturer Part Number: 73S1210F
• Description: The 73S1210F is a versatile and economical CMOS system-on-chip (SoC) device intended for smart card reader applications
• Manufacturer: Maxim

DS_1210F_001
Rev. 1.4
ANALOG Enable
PLL CLOCKS
PWRDN BIT
PWRDN SIG
EXT. EVENT
INT0 to MPU
MPU STOP
t0: MPU sets PWRDN bit.
t1: 32 MPU clock cycles after t0, the PWRDN SIG is asserted, turning all analog functions OFF.
t2: MPU executes STOP instruction, must be done prior to t1.
t3: Analog functions go to OFF condition. No Vref, PLL/VCO, Ibias, etc.
text: An external event (RTC, Keypad, Card event, USB) occurs.
t4: PWRDN bit and PWRDN signal are cleared by external event.
t5: High-speed oscillator/PLL/VCO operating.
t7: INT0 causes MPU to exit STOP condition.
t6: After 512 MPU clock cycles, INT0 to MPU is asserted.
t0
t2
t1
Figure 8: Power Down Sequencing
t3
t4
text
t5
t6
73S1210F Data Sheet
t7
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