71M6541F Maxim, 71M6541F Datasheet - Page 68
71M6541F
Manufacturer Part Number
71M6541F
Description
The 71M6541D/71M6541F/71M6541G/71M6542F/71M6542G are Teridian™ 4th-generation single-phase metering SoCs with a 5MHz 8051-compatible MPU core, low-power RTC with digital temperature compensation, flash memory, and LCD driver
Manufacturer
Maxim
Datasheet
1.71M6541D.pdf
(166 pages)
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down. This can be used to reduce current in LCD mode.
71M6541D/F/G and 71M6542F/G Data Sheet
The LCD bias may be compensated for temperature using the LCD_DAC[4:0] field (I/O RAM 0x240D[4:0]).
The bias may be adjusted from 1.4 V below the 3.3 V supply (V3P3SYS in MSN mode and VBAT in BRN
and LCD modes). When the LCD_DAC[4:0] field is set to 000, the DAC is bypassed and powered
68
STATIC (LCD_MODE=100)
1/3 BIAS, 3 STATES (LCD_MODE = 011 )
SEG_OFF
SEG_OFF
SEG_ON
SEG_ON
COM0
COM1
COM2
COM3
COM4
COM5
COM0
COM1
COM2
COM3
COM4
COM5
0
(1/2)
(1/2)
(1/2)
(1/2)
(1/2)
1
2
(2/3)
(1/3)
1/2 BIAS, 2 STATES (LCD_MODE = 010 )
1/3 BIAS, 4 STATES (LCD_MODE = 000 )
SEG_OFF
SEG_OFF
Figure 21: LCD Waveforms
SEG_ON
SEG_ON
COM0
COM1
COM2
COM3
COM4
COM5
COM0
COM1
COM2
COM3
COM4
COM5
T
0
0
1
1
(1/2)
(1/2)
(1/2)
(1/2)
2
3
1/2 BIAS, 3 STATES (LCD_MODE = 011 )
SEG_OFF
SEG_OFF
SEG_ON
SEG_ON
1/3 BIAS, 6 STATES (LCD_MODE = 110 )
COM0
COM1
COM2
COM3
COM4
COM5
COM0
COM1
COM2
COM3
COM4
COM5
0
0
1
1
2
2
(1/2)
(1/2)
(1/2)
3
4
Rev 2
5
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