71M6541F Maxim, 71M6541F Datasheet - Page 147
71M6541F
Manufacturer Part Number
71M6541F
Description
The 71M6541D/71M6541F/71M6541G/71M6542F/71M6542G are Teridian™ 4th-generation single-phase metering SoCs with a 5MHz 8051-compatible MPU core, low-power RTC with digital temperature compensation, flash memory, and LCD driver
Manufacturer
Maxim
Datasheet
1.71M6541D.pdf
(166 pages)
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Rev 2
Parameter
LCD_DAC Error. VLCD-VLCDnom
DAC=12, no Boost
LCD_DAC Error. VLCD-VLCDnom
Zero Scale, no Boost
LCD_DAC Error. VLCD-VLCDnom
Full Scale, with Boost, LCD mode
Notes:
V3P3 = 3.6 V
V3P3 = 3.0 V
VBAT = 4.0 V, V3P3 = 0 V, BRN Mode
VBAT = 2.5 V, V3P3 = 0 V, BRN Mode
V3P3 = 3.6 V
V3P3 = 3.0 V
VBAT = 4.0 V, V3P3 = 0 V, BRN Mode
VBAT = 2.5 V, V3P3 = 0 V, BRN Mode
VBAT = 4.0 V, V3P3 = 0 V
VBAT = 2.5 V, V3P3 = 0 V
1.
2.
The following test conditions also apply to all parameters provided in this table: bypass capacitor CVLCD ≥
0.1 µF, test load RVLCD = 500 kΩ, no display, all SEGDIO pins configured as DIO.
Guaranteed by design; not production tested.
Condition
LCD_VMODE[1:0] = 1,
LCD_DAC[4:0] = C,
LCD_CLK[1:0]=2,
LCD_MODE[2:0]=6
LCD_VMODE[1:0] = 1,
LCD_DAC[4:0] = 0,
LCD_CLK[1:0]=2,
LCD_MODE[2:0]=6
LCD_VMODE[1:0] = 2,
LCD_DAC[4:0] = 1F,
LCD_CLK[1:0]=2,
LCD_MODE[2:0]=6
71M6541D/F/G and 71M6542F/G Data Sheet
-0.15
-0.15
-0.15
-0.15
-0.45
-0.15
-1.5
Min
-0.5
-1.1
-1.3
2
2
Typ
0.15
Max
0.15
0.15
0.15
0.15
0.15
2
Unit
V
V
V
V
V
V
V
V
V
V
147
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