DS28E02 Maxim, DS28E02 Datasheet - Page 8

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DS28E02

Manufacturer Part Number
DS28E02
Description
The DS28E02 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the FIPS 180-3 Secure Hash Algorithm (SHA-1)
Manufacturer
Maxim
Datasheet

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1-Wire SHA-1 Authenticated 1Kb
EEPROM with 1.8V Operation
Figure 6. Memory Protection Matrix
Figure 7. Address Registers
8
_______________________________________________________________________________________
TARGET ADDRESS (TA1)
TARGET ADDRESS (TA2)
ENDING ADDRESS WITH
DATA STATUS (E/S)
(READ ONLY)
ABRIDGED DATA SHEET
BIT #
T15
AA
T7
7
Refer to the full data sheet.
T14
T6
6
1
T13
PF
T5
5
The DS28E02 employs three address registers: TA1,
TA2, and E/S (Figure 7). These registers are common to
many other 1-Wire devices, but operate slightly differ-
ently with the DS28E02. Registers TA1 and TA2 must be
loaded with the target address to which the data is writ-
ten or from which data is read. Register E/S is a read-
only transfer-status register used to verify data integrity
with write commands. Since the scratchpad of the
DS28E02 is designed to accept data in blocks of 8
bytes only, the lower 3 bits of TA1 are forced to 0 and
T12
T4
4
1
Address Registers and Transfer Status
T11
T3
3
1
T10
(0)
E2
(1)
T2
2
(0)
E1
(1)
T1
T9
1
(0)
E0
(1)
T0
T8
0

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