DS28E02 Maxim, DS28E02 Datasheet - Page 4

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DS28E02

Manufacturer Part Number
DS28E02
Description
The DS28E02 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the FIPS 180-3 Secure Hash Algorithm (SHA-1)
Manufacturer
Maxim
Datasheet

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1-Wire SHA-1 Authenticated 1Kb
EEPROM with 1.8V Operation
The DS28E02 combines 1024 bits of EEPROM orga-
nized as four 256-bit pages, a 64-bit secret, a register
page, a 512-bit SHA-1 engine, and a 64-bit ROM regis-
tration number in a single chip. Data is transferred seri-
ally through the 1-Wire protocol, which requires only a
single data lead and a ground return. The DS28E02
has an additional memory area called the scratchpad
that acts as a buffer when writing to the memory, the
register page, or when installing a new secret. Data is
first written to the scratchpad from where it can be read
back. After the data has been verified, a copy scratch-
pad command transfers the data to its final memory
location, provided that the DS28E02 receives a match-
ing 160-bit MAC. The computation of the MAC involves
the secret and additional data stored in the DS28E02
including the device’s registration number. The
4
3, 4, 5, 6
_______________________________________________________________________________________
TSOC
1
2
PIN
TDFN-EP
1, 4, 5, 6
EP
3
2
TOP VIEW
GND
N.C.
Detailed Description
IO
ABRIDGED DATA SHEET
1
2
3
+
NAME
GND
N.C.
EP
IO
DS28E02
TSOC
Ground Reference
1-Wire Bus Interface. Open-drain signal that requires an external pullup resistor.
Not Connected
Exposed Pad. Solder evenly to the board’s ground plane for proper operation. Refer to
Application Note 3273: Exposed Pads: A Brief Introduction for additional information.
6
5
4
N.C.
N.C.
N.C.
DS28E02 understands a unique command “Refresh
Scratchpad.” Proper use of a refresh sequence after a
copy scratchpad operation reduces the number of
weak bit failures if the device is used in a touch envi-
ronment (see the Writing with Verification section). The
refresh sequence also provides a means to restore
functionality in a device with bits in a weak state.
In addition to its important use as a unique data value in
cryptographic SHA-1 computations, the device's 64-bit
ROM ID guarantees unique identification and can be
used to electronically identify the equipment in which it is
used. The ROM ID is also used to address the device for
the case of a multidrop 1-Wire network environment,
where multiple devices reside on a common 1-Wire bus
and operate independently of each other. Applications of
the DS28E02 include reference design license manage-
ment, system intellectual property protection, accessory
TOP VIEW
GND
N.C.
IO
1
2
3
+
EP
FUNCTION
(3mm
DS28E02
TDFN
×
3mm)
Pin Configurations
6
5
4
Pin Description
N.C.
N.C.
N.C.

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