ST92124V1Q-Auto STMicroelectronics, ST92124V1Q-Auto Datasheet - Page 325

• Manufacturer Part Number: ST92124V1Q-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST92124V1Q-Auto

• Internal Memory: Single Voltage FLASH up to 256 Kbytes, RAM up to 8Kbytes, 1K byte E3 TM (Emulated EEPROM)
• Minimum Instruction Time: 83 ns (24 MHz int. clock)

10.10 CONTROLLER AREA NETWORK (bxCAN)
10.10.1 Introduction
This peripheral Basic Extended CAN, named bx-
CAN, interfaces the CAN network. It supports the
CAN protocol version 2.0A and B. It has been de-
signed to manage a high number of incoming mes-
sages efficiently with a minimum CPU load. It also
meets the priority requirements for transmit mes-
sages.
For safety-critical applications, the CAN controller
provides all hardware functions for supporting the
CAN Time Triggered Communication option.
10.10.2 Main Features
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Transmission
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Reception
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Time Triggered Communication Option
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Figure 142. CAN Network Topology
Supports CAN protocol version 2.0 A, B Active
Bit rates up to 1Mbit/s
Supports the Time Triggered Communication
option
Three transmit mailboxes
Configurable transmit priority
Time Stamp on SOF transmission
Two receive FIFOs with three stages
Eight scalable filter banks
Identifier list feature
Configurable FIFO overrun
Time Stamp on SOF reception
Disable automatic retransmission mode
CAN Bus
CAN
Rx
CAN
High
Application
ST9 MCU
CAN
Transceiver
CAN
Controller
CAN
CAN
Tx
Low
ST92124xxx-Auto/150xxxxx-Auto/250xxxx-Auto
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Management
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10.10.3 General Description
In today’s CAN applications, the number of nodes
in a network is increasing and often several net-
works are linked together via gateways. Typically
the number of messages in the system (and thus
to be handled by each node) has significantly in-
creased. In addition to the application messages,
Network Management and Diagnostic messages
have been introduced.
– An enhanced filtering mechanism is required to
Furthermore, application tasks require more CPU
time, therefore real-time constraints caused by
message reception have to be reduced.
– A receive FIFO scheme allows the CPU to be
The standard HLP (Higher Layer Protocol) based
on standard CAN drivers requires an efficient in-
terface to the CAN controller.
– All mailboxes and registers are organized in 16-
handle each type of message.
dedicated to application tasks for a long time pe-
riod without losing messages.
byte pages mapped at the same address and se-
lected via a page select register.
16-bit free running timer
Configurable timer resolution
Time Stamp sent in last two data bytes
Maskable interrupts
Software-efficient mailbox mapping at a unique
address space
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