ST7FOXK1 STMicroelectronics, ST7FOXK1 Datasheet - Page 133
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ST7FOXK1
Manufacturer Part Number
ST7FOXK1
Description
Low cost flash 8bit micro
Manufacturer
STMicroelectronics
Datasheet
1.ST7FOXK1.pdf
(226 pages)
Specifications of ST7FOXK1
4 To 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
1K write/erase cycles guaranteed Data retention
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wakeup from Halt, Wait and Slow
A/d Converter
up to 10 input channels
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
ST7FOXK1T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Company:
Part Number:
ST7FOXK1T6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
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ST7FOXF1, ST7FOXK1, ST7FOXK2
10.4.7
16-bit timer registers
Each timer is associated with three control and status registers, and with six pairs of data
registers (16-bit values) relating to the two input captures, the two output compares, the
counter and the alternate counter.
TIMA Control register 1 (TACR1)
Reset value: 0000 0000 (00h)
Bit 7 = ICIE Input capture interrupt enable
Bit 6 = OCIE Output compare interrupt enable
Bit 5 = TOIE Timer overflow interrupt enable
Bit 4 = FOLV2 Forced output compare 2
Bit 3 = FOLV1 Forced output compare 1
Bit 2 = OLVL2 Output level 2
ICIE
0: Interrupt is inhibited
1: A timer interrupt is generated whenever the ICF1 or ICF2 bit of the SR register is
set
0: Interrupt is inhibited
1: A timer interrupt is generated whenever the OCF1 or OCF2 bit of the SR register is
set
0: Interrupt is inhibited
1: A timer interrupt is enabled whenever the TOF bit of the SR register is set
This bit is set and cleared by software.
0: No effect on the OCMP2 pin
1: Forces the OLVL2 bit to be copied to the OCMP2 pin, if the OC2E bit is set and
even if there is no successful comparison
This bit is set and cleared by software.
0: No effect on the OCMP1 pin
1: Forces OLVL1 to be copied to the OCMP1 pin, if the OC1E bit is set and even if
there is no successful comparison
This bit is copied to the OCMP2 pin whenever a successful comparison occurs with the
OC2R register and OCxE is set in the CR2 register. This value is copied to the OCMP1
pin in one pulse mode and pulse width modulation mode.
7
OCIE
TOIE
FOLV2
Read / Write
FOLV1
OLVL2
On-chip peripherals
IEDG1
OLVL1
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