ST92F150JDV1 STMicroelectronics, ST92F150JDV1 Datasheet - Page 426
ST92F150JDV1
Manufacturer Part Number
ST92F150JDV1
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet
1.ST92F150CR1.pdf
(429 pages)
Specifications of ST92F150JDV1
Internal Memory
Single Voltage FLASH up to 256 Kbytes, RAM up to 8Kbytes, 1K byte E3 (Emulated EEPROM)
Minimum Instruction Time
83 ns (24 MHz int. clock)
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ST92F124/F150/F250 - KNOWN LIMITATIONS
13.8.9 SCI-A wrong break duration
Description
A single break character is sent by setting and re-
setting the SBK bit in the SCICR2 register. In
some cases, the break character may have a
longer duration than expected:
- 20 bits instead of 10 bits if M=0
- 22 bits instead of 11 bits if M=1.
In the same way, as long as the SBK bit is set,
break characters are sent to the TDO pin. This
may lead to generate one break more than ex-
pected.
Occurrence
The occurrence of the problem is random and pro-
portional to the baudrate. With a transmit fre-
q u e n c y o f 1 9 2 0 0 b a u d ( f
SCIBRR=0xC9), the wrong break duration occur-
rence is around 1%.
426/429
1
C P U
= 8 M H z a n d
Workaround
If this wrong duration is not compliant with the
communication protocol in the application, soft-
ware can request that an Idle line be generated
before the break character. In this case, the break
duration is always correct assuming the applica-
tion is not doing anything between the idle and the
break. This can be ensured by temporarily disa-
bling interrupts.
The exact sequence is:
- Disable interrupts
- Reset and Set TE (IDLE request)
- Set and Reset SBK (Break Request)
- Re-enable interrupts
LIN mode (if available)
If the LINE bit in the SCICR3 is set and the M bit in
the SCICR1 register is reset, the SCI-A is in LIN
master mode. A single break character is sent by
setting and resetting the SBK bit in the SCICR2
register. In some cases, the break character may
have a longer duration than expected:
- 24 bits instead of 13 bits
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