ST72321AR7 STMicroelectronics, ST72321AR7 Datasheet - Page 134

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ST72321AR7

Manufacturer Part Number
ST72321AR7
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH,10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72321AR7

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator, clock security system and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt,Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
ST72321Rx ST72321ARx ST72321Jx
INSTRUCTION SET OVERVIEW (Cont’d)
11.1.6 Indirect Indexed (Short, Long)
This is a combination of indirect and short indexed
addressing modes. The operand is referenced by
its memory address, which is defined by the un-
signed addition of an index register value (X or Y)
with a pointer value located in memory. The point-
er address follows the opcode.
The indirect indexed addressing mode consists of
two submodes:
Indirect Indexed (Short)
The pointer address is a byte, the pointer size is a
byte, thus allowing 00 - 1FE addressing space,
and requires 1 byte after the opcode.
Indirect Indexed (Long)
The pointer address is a byte, the pointer size is a
word, thus allowing 64 Kbyte addressing space,
and requires 1 byte after the opcode.
Table 27. Instructions Supporting Direct,
Indexed,
Addressing Modes
134/193
Short Instructions Only
LD
CP
AND, OR, XOR
ADC, ADD, SUB, SBC
BCP
CLR
INC, DEC
TNZ
CPL, NEG
BSET, BRES
BTJT, BTJF
SLL, SRL, SRA, RLC,
RRC
SWAP
CALL, JP
Long and Short
Instructions
Indirect
and
Clear
Increment/Decrement
Test Negative or Zero
1 or 2 Complement
Bit Operations
Bit Test and Jump Opera-
tions
Shift and Rotate Operations
Swap Nibbles
Call or Jump subroutine
Load
Compare
Logical Operations
Arithmetic Additions/Sub-
stractions operations
Bit Compare
Indirect
Function
Function
Indexed
11.1.7 Relative mode (Direct, Indirect)
This addressing mode is used to modify the PC
register value, by adding an 8-bit signed offset to
it.
The relative addressing mode consists of two sub-
modes:
Relative (Direct)
The offset is following the opcode.
Relative (Indirect)
The offset is defined in memory, which address
follows the opcode.
JRxx
CALLR
Available Relative
Direct/Indirect
Instructions
Conditional Jump
Call Relative
Function

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