ST72321M9 STMicroelectronics, ST72321M9 Datasheet - Page 146
ST72321M9
Manufacturer Part Number
ST72321M9
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet
1.ST72321M9.pdf
(175 pages)
Specifications of ST72321M9
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt,Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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ST72321M6 ST72321M9
CLOCK CHARACTERISTICS (Cont’d)
Note:
1. Data based on characterization results.
11.5.5 PLL Characteristics
Note:
1. Data characterized but not tested.
The user must take the PLL jitter into account in the application (for example in serial communication or
sampling of high frequency signals). The PLL jitter is a periodic effect, which is integrated over several
CPU cycles. Therefore the longer the period of the application signal, the less it will be impacted by the
PLL jitter.
Figure 75
quencies of less than 125 kHz, the jitter is negligible.
Figure 75. Integrated PLL Jitter vs signal frequency
Note 1: Measurement conditions: f
146/175
+/-Jitter (%)
f
Δ f
OSC
Symbol
CPU
+/-Jitter (%)
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
/ f
0
1.2
0.8
0.6
0.4
0.2
CPU
1
0
shows the PLL jitter integrated on application signals in the range 125 kHz to 4 MHz. At fre-
4 MHz
4 MHz
PLL input frequency range
Instantaneous PLL jitter
2 MHz
2 MHz
Parameter
Application Frequency
Application Frequency
1 MHz 500 kHz 250 kHz 125 kHz
1 MHz
1)
CPU
500 kHz
= 8 MHz.
FLASH typ
ROM max
ROM typ
f
OSC
f
OSC
= 4 MHz.
= 2 MHz.
250 kHz
Conditions
1
Min
2
Typ
1.0
2.5
Max
2.5
4.0
4
MHz
Unit
%
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