ST72561AR7 STMicroelectronics, ST72561AR7 Datasheet - Page 198

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ST72561AR7

Manufacturer Part Number
ST72561AR7
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72561AR7

Hdflash Endurance
100 cycles, data retention 40 years at 85°C
5 Power Saving Modes
Halt, Auto Wake Up From Halt, Active Halt, Wait and Slow
ST72561
beCAN CONTROLLER (Cont’d)
Bits 3:0 BS1[3:0] Time Segment 1
These bits define the number of time quanta in
Time Segment 1
Time Segment 1 = (BS1+1)
For more information on bit timing, please refer to
Section 0.1.4.6 Bit
CAN FILTER PAGE SELECT REGISTER
(CPSR)
All bits of this register are set and cleared by soft-
ware.
Read / Write
Reset Value: 0000 0000 (00h)
198/265
7
0
0
0
Timing.
0
0
FPS2
FPS1
FPS0
0
Bits 7:3 = Reserved. Forced to 0 by hardware.
Bits 2:0 = PS[2:0] Page Select
- Read/Write
This register contains the page number.
Table 31. Filter Page Selection
PS[2:0]
0
1
2
3
4
5
6
7
Tx Mailbox 0
Tx Mailbox 1
Acceptance Filter 0:1
Acceptance Filter 2:3
Acceptance Filter 4:5
Reserved
Configuration/Diagnosis
Receive FIFO
Page Selected

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