STM8L101F3 STMicroelectronics, STM8L101F3 Datasheet - Page 55
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STM8L101F3
Manufacturer Part Number
STM8L101F3
Description
Ultra Low Power MCUs, STM8L
Manufacturer
STMicroelectronics
Datasheet
1.STM8L101G2.pdf
(81 pages)
Specifications of STM8L101F3
Low Power Consumption (halt
0.3 μA, Active-halt
Temp. Range
-40 to 85 °C and 125 °C
Three Low Power Modes
Wait, Active-halt, Halt
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STM8L101xx
NRST pin
The NRST pin input driver is CMOS. A permanent pull-up is present.
R
Subject to general operating conditions for V
Table 30.
1. Data based on characterization results, not tested in production.
2. The R
3. Data guaranteed by design, not tested in production.
Figure 30. Typical NRST pull-up resistance R
R
PU(NRST)
V
V
V
t
V
V
Symbol
OP(NRST)
OL(NRST)
PU(NRST)
NF(NRST)
IH(NRST)
characteristics are described in
IL(NRST)
F(NRST)
PU
pull-up equivalent resistor is based on a resistive transistor
has the same value as R
NRST pin characteristics
NRST input low level voltage
NRST input high level voltage
NRST output low level voltage
NRST pull-up equivalent resistor
NRST input filtered pulse
NRST output pulse width
NRST input not filtered pulse
60
55
50
45
40
35
30
1.65 1.8 1.95 2.1 2.25 2.4 2.55 2.7 2.85
Parameter
Figure
Doc ID 15275 Rev 11
31.
PU
(3)
(see
(1)
(3)
(1)
V
DD
(2)
[V]
Table 26 on page
DD
and T
I
OL
Conditions
PU
3
= 2 mA
-40°C
25°C
85°C
125°C
vs. V
3.15 3.3 3.45 3.6
A
unless otherwise specified.
(Figure
DD
ai17007
50).
Min
V
300
30). Corresponding I
1.4
30
20
SS
-
-
Electrical parameters
Typ
45
-
-
-
-
-
-
(1)
V
DD
Max
V
0.8
60
50
PU
DD
-
-
-0.8
current
55/81
Unit
k
ns
ns
ns
V